build/patch/kernel/archive/sunxi-5.10/megous/ARM-dts-sun8i-a83t-tbs-a711-Add-rear-camera-sensor-H.patch

From 4e4c89df7f4ec07a315b458022bba170aeade73a Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megous@megous.com>
Date: Tue, 23 Jun 2020 19:43:24 +0200
Subject: [PATCH 027/351] ARM: dts: sun8i-a83t-tbs-a711: Add rear camera sensor
 (HM5065)

Sensor is connected via parallel bus to CSI and via I2C bus to
PE14/PE15 pins. Enable CSI module and add the node for HM5065
camera sensor.

Camera sensors are connected via I2C to PE14/PE15 pins on A83T.
Unfortunately while the A83T datasheet suggests TWI2 I2C controller
can be configured to have SDA/SCL on these pins, this configuration
doesn't work in reality. We need to either use CCI I2C controller
that is part of the CSI module, or as is done in this patch, use GPIO
based bitbanging I2C driver.

Reduce camera IOVDD voltage.

Force dvdd-csi-r/f regulators to 1.8V.

This is required by camera sensors that are connected to them.

Signed-off-by: Ondrej Jirman <megous@megous.com>

# Conflicts:
#	arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 64 ++++++++++++++++++++++-
 1 file changed, 62 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 71d5923d2e34..af9a83988e5e 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -70,6 +70,16 @@ backlight: backlight {
 		default-brightness-level = <9>;
 	};
 
+	i2c_gpio: i2c-gpio {
+		compatible = "i2c-gpio";
+		/* PE15 = sda, PE14 = scl */
+		sda-gpios = <&pio 4 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&pio 4 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <1>; /* ~100 kHz */
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
 	panel {
 		compatible = "tbs,a711-panel", "panel-lvds";
 		backlight = <&backlight>;
@@ -220,6 +230,13 @@ link2_codec: codec {
 	};
 };
 
+&ccu {
+	/* Use a stable clock source with known fixed rate for MCLK */
+	assigned-clocks = <&ccu CLK_CSI_MCLK>;
+	assigned-clock-parents = <&osc24M>;
+	assigned-clock-rates = <24000000>;
+};
+
 &cpu0 {
 	cpu-supply = <&reg_dcdc2>;
 };
@@ -228,6 +245,23 @@ &cpu100 {
 	cpu-supply = <&reg_dcdc3>;
 };
 
+&csi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&csi_8bit_parallel_pins>, <&csi_mclk_pin>;
+	status = "okay";
+};
+
+&csi_in {
+	csi_hm5065_ep: endpoint {
+		remote-endpoint = <&hm5065_ep>;
+		bus-width = <8>;
+		data-active = <1>;
+		pclk-sample = <0>;
+		hsync-active = <0>;
+		vsync-active = <1>;
+	};
+};
+
 &de {
 	status = "okay";
 };
@@ -288,6 +322,32 @@ npc100: nfc@28 {
 	};
 };
 
+&i2c_gpio {
+	hm5065: camera@1f {
+		compatible = "himax,hm5065";
+		reg = <0x1f>;
+		clocks = <&ccu CLK_CSI_MCLK>;
+		clock-names = "xclk";
+		IOVDD-supply = <&reg_dldo3>;
+		AVDD-supply = <&reg_dldo4>;
+		DVDD-supply = <&reg_eldo3>;
+		AFVDD-supply = <&reg_dldo3>;
+		reset-gpios = <&pio 4 18 GPIO_ACTIVE_LOW>; /* PE18 */
+		enable-gpios = <&pio 4 19 GPIO_ACTIVE_HIGH>; /* PE19 */
+
+		port {
+			hm5065_ep: endpoint {
+				remote-endpoint = <&csi_hm5065_ep>;
+				bus-width = <8>;
+				data-active = <1>;
+				pclk-sample = <0>;
+				hsync-active = <0>;
+				vsync-active = <1>;
+			};
+		};
+	};
+};
+
 &i2s0 {
 	status = "okay";
 	pinctrl-names = "default";
@@ -509,7 +569,7 @@ &reg_drivevbus {
 };
 
 &reg_eldo1 {
-	regulator-min-microvolt = <1200000>;
+	regulator-min-microvolt = <1800000>;
 	regulator-max-microvolt = <1800000>;
 	regulator-name = "pvdd-nfc";
 	regulator-always-on;
@@ -522,7 +582,7 @@ &reg_eldo2 {
 };
 
 &reg_eldo3 {
-	regulator-min-microvolt = <1200000>;
+	regulator-min-microvolt = <1800000>;
 	regulator-max-microvolt = <1800000>;
 	regulator-name = "dvdd-csi-f";
 };
-- 
2.34.0