103 lines
3.6 KiB
Diff
103 lines
3.6 KiB
Diff
From 6d16e90fdb989f48c12660575d7cb0373b030d57 Mon Sep 17 00:00:00 2001
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From: Peter Geis <pgwipeout@gmail.com>
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Date: Sun, 1 Aug 2021 16:28:58 -0400
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Subject: [PATCH 098/478] arm64: dts: rockchip: add uart dma names
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The dma driver expects the dma names to be assigned to the dma channels.
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This prevents the dma driver from probing the uart dmas.
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Fix this by adding the tx and rx dma names to their respective nodes.
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Signed-off-by: Peter Geis <pgwipeout@gmail.com>
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---
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arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 ++++++++++
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1 file changed, 10 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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index 460a4fde4702..5fee06df03dc 100644
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--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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@@ -424,6 +424,7 @@ uart0: serial@fdd50000 {
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clocks = <&pmucru SCLK_UART0>, <&pmucru PCLK_UART0>;
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clock-names = "baudclk", "apb_pclk";
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dmas = <&dmac0 0>, <&dmac0 1>;
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+ dma-names = "tx", "rx";
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pinctrl-0 = <&uart0_xfer>;
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pinctrl-names = "default";
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reg-io-width = <4>;
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@@ -972,6 +973,7 @@ uart1: serial@fe650000 {
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clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
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clock-names = "baudclk", "apb_pclk";
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dmas = <&dmac0 2>, <&dmac0 3>;
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+ dma-names = "tx", "rx";
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pinctrl-0 = <&uart1m0_xfer>;
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pinctrl-names = "default";
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reg-io-width = <4>;
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@@ -986,6 +988,7 @@ uart2: serial@fe660000 {
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clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
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clock-names = "baudclk", "apb_pclk";
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dmas = <&dmac0 4>, <&dmac0 5>;
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+ dma-names = "tx", "rx";
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pinctrl-0 = <&uart2m0_xfer>;
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pinctrl-names = "default";
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reg-io-width = <4>;
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@@ -1000,6 +1003,7 @@ uart3: serial@fe670000 {
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clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
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clock-names = "baudclk", "apb_pclk";
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dmas = <&dmac0 6>, <&dmac0 7>;
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+ dma-names = "tx", "rx";
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pinctrl-0 = <&uart3m0_xfer>;
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pinctrl-names = "default";
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reg-io-width = <4>;
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@@ -1014,6 +1018,7 @@ uart4: serial@fe680000 {
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clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
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clock-names = "baudclk", "apb_pclk";
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dmas = <&dmac0 8>, <&dmac0 9>;
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+ dma-names = "tx", "rx";
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pinctrl-0 = <&uart4m0_xfer>;
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pinctrl-names = "default";
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reg-io-width = <4>;
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@@ -1028,6 +1033,7 @@ uart5: serial@fe690000 {
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clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
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clock-names = "baudclk", "apb_pclk";
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dmas = <&dmac0 10>, <&dmac0 11>;
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+ dma-names = "tx", "rx";
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pinctrl-0 = <&uart5m0_xfer>;
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pinctrl-names = "default";
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reg-io-width = <4>;
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@@ -1042,6 +1048,7 @@ uart6: serial@fe6a0000 {
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clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>;
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clock-names = "baudclk", "apb_pclk";
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dmas = <&dmac0 12>, <&dmac0 13>;
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+ dma-names = "tx", "rx";
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pinctrl-0 = <&uart6m0_xfer>;
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pinctrl-names = "default";
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reg-io-width = <4>;
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@@ -1056,6 +1063,7 @@ uart7: serial@fe6b0000 {
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clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>;
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clock-names = "baudclk", "apb_pclk";
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dmas = <&dmac0 14>, <&dmac0 15>;
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+ dma-names = "tx", "rx";
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pinctrl-0 = <&uart7m0_xfer>;
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pinctrl-names = "default";
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reg-io-width = <4>;
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@@ -1070,6 +1078,7 @@ uart8: serial@fe6c0000 {
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clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>;
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clock-names = "baudclk", "apb_pclk";
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dmas = <&dmac0 16>, <&dmac0 17>;
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+ dma-names = "tx", "rx";
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pinctrl-0 = <&uart8m0_xfer>;
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pinctrl-names = "default";
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reg-io-width = <4>;
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@@ -1084,6 +1093,7 @@ uart9: serial@fe6d0000 {
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clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>;
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clock-names = "baudclk", "apb_pclk";
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dmas = <&dmac0 18>, <&dmac0 19>;
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+ dma-names = "tx", "rx";
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pinctrl-0 = <&uart9m0_xfer>;
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pinctrl-names = "default";
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reg-io-width = <4>;
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--
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2.35.3
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