107 lines
3.6 KiB
Diff
107 lines
3.6 KiB
Diff
From c41d6dac9726fda4041c270197f6d0fdb7c3b36c Mon Sep 17 00:00:00 2001
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From: Peter Geis <pgwipeout@gmail.com>
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Date: Tue, 27 Jul 2021 14:59:24 -0400
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Subject: [PATCH 429/478] phy: phy-rockchip-inno-usb2: add rk3568 support
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The rk3568 usb2phy is a standalone device with a single muxed interrupt.
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Add support for the registers to the usb2phy driver.
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Signed-off-by: Peter Geis <pgwipeout@gmail.com>
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---
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drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 65 +++++++++++++++++++
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1 file changed, 65 insertions(+)
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diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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index 7cd842e0187e..c4b62a32b989 100644
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--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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@@ -1100,6 +1100,7 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy,
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if (ret) {
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dev_err(rphy->dev, "failed to init irq for host port\n");
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goto out;
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+ }
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if (!IS_ERR(rphy->edev)) {
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rport->event_nb.notifier_call = rockchip_otg_event;
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@@ -1511,6 +1512,69 @@ static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
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{ /* sentinel */ }
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};
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+static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = {
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+ {
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+ .reg = 0xfe8a0000,
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+ .num_ports = 2,
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+ .clkout_ctl = { 0x0008, 4, 4, 1, 0 },
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+ .port_cfgs = {
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+ [USB2PHY_PORT_OTG] = {
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+ .phy_sus = { 0x0000, 8, 0, 0, 0x1d1 },
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+ .bvalid_det_en = { 0x0080, 2, 2, 0, 1 },
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+ .bvalid_det_st = { 0x0084, 2, 2, 0, 1 },
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+ .bvalid_det_clr = { 0x0088, 2, 2, 0, 1 },
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+ .utmi_avalid = { 0x00c0, 10, 10, 0, 1 },
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+ .utmi_bvalid = { 0x00c0, 9, 9, 0, 1 },
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+ },
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+ [USB2PHY_PORT_HOST] = {
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+ /* Select suspend control from controller */
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+ .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d2 },
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+ .ls_det_en = { 0x0080, 1, 1, 0, 1 },
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+ .ls_det_st = { 0x0084, 1, 1, 0, 1 },
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+ .ls_det_clr = { 0x0088, 1, 1, 0, 1 },
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+ .utmi_ls = { 0x00c0, 17, 16, 0, 1 },
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+ .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 }
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+ }
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+ },
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+ .chg_det = {
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+ .opmode = { 0x0000, 3, 0, 5, 1 },
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+ .cp_det = { 0x00c0, 24, 24, 0, 1 },
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+ .dcp_det = { 0x00c0, 23, 23, 0, 1 },
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+ .dp_det = { 0x00c0, 25, 25, 0, 1 },
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+ .idm_sink_en = { 0x0008, 8, 8, 0, 1 },
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+ .idp_sink_en = { 0x0008, 7, 7, 0, 1 },
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+ .idp_src_en = { 0x0008, 9, 9, 0, 1 },
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+ .rdm_pdwn_en = { 0x0008, 10, 10, 0, 1 },
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+ .vdm_src_en = { 0x0008, 12, 12, 0, 1 },
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+ .vdp_src_en = { 0x0008, 11, 11, 0, 1 },
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+ },
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+ },
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+ {
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+ .reg = 0xfe8b0000,
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+ .num_ports = 2,
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+ .clkout_ctl = { 0x0008, 4, 4, 1, 0 },
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+ .port_cfgs = {
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+ [USB2PHY_PORT_OTG] = {
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+ .phy_sus = { 0x0000, 8, 0, 0x1d2, 0x1d1 },
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+ .ls_det_en = { 0x0080, 0, 0, 0, 1 },
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+ .ls_det_st = { 0x0084, 0, 0, 0, 1 },
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+ .ls_det_clr = { 0x0088, 0, 0, 0, 1 },
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+ .utmi_ls = { 0x00c0, 5, 4, 0, 1 },
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+ .utmi_hstdet = { 0x00c0, 7, 7, 0, 1 }
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+ },
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+ [USB2PHY_PORT_HOST] = {
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+ .phy_sus = { 0x0004, 8, 0, 0x1d2, 0x1d1 },
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+ .ls_det_en = { 0x0080, 1, 1, 0, 1 },
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+ .ls_det_st = { 0x0084, 1, 1, 0, 1 },
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+ .ls_det_clr = { 0x0088, 1, 1, 0, 1 },
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+ .utmi_ls = { 0x00c0, 17, 16, 0, 1 },
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+ .utmi_hstdet = { 0x00c0, 19, 19, 0, 1 }
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+ }
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+ },
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+ },
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+ { /* sentinel */ }
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+};
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+
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static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
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{
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.reg = 0x100,
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@@ -1560,6 +1624,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = {
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{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
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{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
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{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
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+ { .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
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{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
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{}
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};
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--
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2.35.3
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