build/patch/kernel/archive/sunxi-6.1/patches.megous/media-i2c-imx258-Fix-lower-modes-still-broken.patch

177 lines
5.2 KiB
Diff

From 154f9289891fa2b8354aed4b4411f69d79d8a108 Mon Sep 17 00:00:00 2001
From: Ondrej Jirman <megi@xff.cz>
Date: Wed, 25 May 2022 22:59:18 +0200
Subject: [PATCH 352/389] media: i2c: imx258: Fix lower modes (still broken)
...
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
drivers/media/i2c/imx258.c | 94 +++++++++++++++++++-------------------
1 file changed, 47 insertions(+), 47 deletions(-)
diff --git a/drivers/media/i2c/imx258.c b/drivers/media/i2c/imx258.c
index 0639fd6a62b8..9bc948038459 100644
--- a/drivers/media/i2c/imx258.c
+++ b/drivers/media/i2c/imx258.c
@@ -187,17 +187,17 @@ static const struct imx258_reg mipi_data_rate_1267mbps[] = {
};
static const struct imx258_reg mipi_data_rate_640mbps[] = {
- REG8(IVTPXCK_DIV, 0x05),
- REG8(IVTSYCK_DIV, 0x02),
- REG8(PREPLLCK_VT_DIV, 0x03),
- REG16(PLL_IVT_MPY, 0x0064), // 100
- REG8(IOPPXCK_DIV, 0x0a),
- REG8(IOPSYCK_DIV, 0x01),
- REG8(PREPLLCK_OP_DIV, 0x02),
- REG16(PLL_IOP_MPY, 0x00d8), // 216
- REG8(PLL_MULT_DRIV, 0x00),
- REG16(REQ_LINK_BIT_RATE_MBPS_H, 0x0a00), // 2560
- REG16(REQ_LINK_BIT_RATE_MBPS_L, 0x0000), // 0
+ REG8(IVTPXCK_DIV, 5),
+ REG8(IVTSYCK_DIV, 2),
+ REG8(PREPLLCK_VT_DIV, 4),
+ REG16(PLL_IVT_MPY, 107),
+ REG8(IOPPXCK_DIV, 10),
+ REG8(IOPSYCK_DIV, 1),
+ REG8(PREPLLCK_OP_DIV, 2),
+ REG16(PLL_IOP_MPY, 216),
+ REG8(PLL_MULT_DRIV, 0),
+ REG16(REQ_LINK_BIT_RATE_MBPS_H, 2568),
+ REG16(REQ_LINK_BIT_RATE_MBPS_L, 0),
};
static const struct imx258_reg common_regs[] = {
@@ -472,28 +472,28 @@ static const struct imx258_reg common_regs[] = {
};
static const struct imx258_reg mode_4208x3118_regs[] = {
- REG16(CSI_DT_FMT, 0x0a0a), // 2570
+ REG16(CSI_DT_FMT, 0x0a0a),
REG8(CSI_LANE_MODE, 0x03),
- REG16(LINE_LENGTH_PCK, 0x14e8), // 5352
- REG16(FRM_LENGTH_LINES, 0x0c50), // 3152
+ REG16(LINE_LENGTH_PCK, 5352),
+ REG16(FRM_LENGTH_LINES, 3152),
REG16(X_ADD_STA, 0),
REG16(Y_ADD_STA, 0),
REG16(X_ADD_END, 4207),
REG16(Y_ADD_END, 3119),
- REG8(X_EVN_INC, 0x01),
- REG8(X_ODD_INC, 0x01),
- REG8(Y_EVN_INC, 0x01),
- REG8(Y_ODD_INC, 0x01),
+ REG8(X_EVN_INC, 1),
+ REG8(X_ODD_INC, 1),
+ REG8(Y_EVN_INC, 1),
+ REG8(Y_ODD_INC, 1),
REG8(BINNING_MODE, 0x00),
REG8(BINNING_TYPE_V, 0x11),
REG8(SCALE_MODE, 0x00),
- REG16(SCALE_M, 0x0010), // 16
+ REG16(SCALE_M, 16),
REG16(DIG_CROP_X_OFFSET, 0),
REG16(DIG_CROP_Y_OFFSET, 0),
REG16(DIG_CROP_IMAGE_WIDTH, 4208),
REG16(DIG_CROP_IMAGE_HEIGHT, 3120),
REG8(SCALE_MODE_EXT, 0x00),
- REG16(SCALE_M_EXT, 0x0010), // 16
+ REG16(SCALE_M_EXT, 16),
REG8(FORCE_FD_SUM, 0x00),
REG16(X_OUT_SIZE, 4208),
REG16(Y_OUT_SIZE, 3120),
@@ -532,28 +532,28 @@ static const struct imx258_reg mode_4032x3024_regs[] = {
};
static const struct imx258_reg mode_2104_1560_regs[] = {
- REG16(CSI_DT_FMT, 0x0a0a), // 2570
+ REG16(CSI_DT_FMT, 0x0a0a),
REG8(CSI_LANE_MODE, 0x03),
- REG16(LINE_LENGTH_PCK, 0x14e8), // 5352
- REG16(FRM_LENGTH_LINES, 0x0638), // 1592
+ REG16(LINE_LENGTH_PCK, 5352),
+ REG16(FRM_LENGTH_LINES, 1592),
REG16(X_ADD_STA, 0),
REG16(Y_ADD_STA, 0),
REG16(X_ADD_END, 4207),
REG16(Y_ADD_END, 3119),
- REG8(X_EVN_INC, 0x01),
- REG8(X_ODD_INC, 0x01),
- REG8(Y_EVN_INC, 0x01),
- REG8(Y_ODD_INC, 0x01),
+ REG8(X_EVN_INC, 1),
+ REG8(X_ODD_INC, 1),
+ REG8(Y_EVN_INC, 1),
+ REG8(Y_ODD_INC, 1),
REG8(BINNING_MODE, 0x01),
REG8(BINNING_TYPE_V, 0x12),
- REG8(SCALE_MODE, 0x01),
- REG16(SCALE_M, 0x0020), // 32
+ REG8(SCALE_MODE, 1),
+ REG16(SCALE_M, 32),
REG16(DIG_CROP_X_OFFSET, 2),
REG16(DIG_CROP_Y_OFFSET, 0),
REG16(DIG_CROP_IMAGE_WIDTH, 4208),
REG16(DIG_CROP_IMAGE_HEIGHT, 1560),
REG8(SCALE_MODE_EXT, 0x00),
- REG16(SCALE_M_EXT, 0x0010), // 16
+ REG16(SCALE_M_EXT, 16),
REG8(FORCE_FD_SUM, 0x00),
REG16(X_OUT_SIZE, 2104),
REG16(Y_OUT_SIZE, 1560),
@@ -562,33 +562,33 @@ static const struct imx258_reg mode_2104_1560_regs[] = {
};
static const struct imx258_reg mode_1048_780_regs[] = {
- REG16(CSI_DT_FMT, 0x0a0a), // 2570
+ REG16(CSI_DT_FMT, 0x0a0a),
REG8(CSI_LANE_MODE, 0x03),
- REG16(LINE_LENGTH_PCK, 0x14e8), // 5352
- REG16(FRM_LENGTH_LINES, 0x034c), // 844
- REG16(X_ADD_STA, 0x0000), // 0
- REG16(Y_ADD_STA, 0x0000), // 0
+ REG16(LINE_LENGTH_PCK, 5352),
+ REG16(FRM_LENGTH_LINES, 844),
+ REG16(X_ADD_STA, 0),
+ REG16(Y_ADD_STA, 0),
REG16(X_ADD_END, 4191),
REG16(Y_ADD_END, 3119),
- REG8(X_EVN_INC, 0x01),
- REG8(X_ODD_INC, 0x01),
- REG8(Y_EVN_INC, 0x01),
- REG8(Y_ODD_INC, 0x01),
+ REG8(X_EVN_INC, 1),
+ REG8(X_ODD_INC, 1),
+ REG8(Y_EVN_INC, 1),
+ REG8(Y_ODD_INC, 1),
REG8(BINNING_MODE, 0x01),
REG8(BINNING_TYPE_V, 0x14),
REG8(SCALE_MODE, 0x01),
- REG16(SCALE_M, 0x0040), // 64
- REG16(DIG_CROP_X_OFFSET, 0x0006), // 6
- REG16(DIG_CROP_Y_OFFSET, 0x0000), // 0
+ REG16(SCALE_M, 64),
+ REG16(DIG_CROP_X_OFFSET, 6),
+ REG16(DIG_CROP_Y_OFFSET, 0),
REG16(DIG_CROP_IMAGE_WIDTH, 4192),
- REG16(DIG_CROP_IMAGE_HEIGHT, 780), // 780
+ REG16(DIG_CROP_IMAGE_HEIGHT, 780),
REG8(SCALE_MODE_EXT, 0x00),
- REG16(SCALE_M_EXT, 0x0010), // 16
+ REG16(SCALE_M_EXT, 16),
REG8(FORCE_FD_SUM, 0x00),
- REG16(X_OUT_SIZE, 1048), // 1048
- REG16(Y_OUT_SIZE, 780), // 780
+ REG16(X_OUT_SIZE, 1048),
+ REG16(Y_OUT_SIZE, 780),
REG8(FRM_LENGTH_CTL, 0x01),
- REG16(COARSE_INTEG_TIME, 0x0342), // 834
+ REG16(COARSE_INTEG_TIME, 834),
};
static const char * const imx258_test_pattern_menu[] = {
--
2.35.3