build/patch/kernel/archive/sunxi-6.2/patches.megous/iio-adc-axp20x_adc-allow-to-set-TS-pin-to-GPADC-mode.patch

44 lines
1.5 KiB
Diff

From c293ff122032e9b1fc40bc32e980a67327bbcf15 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Tue, 10 Sep 2019 12:03:32 +0800
Subject: [PATCH 216/391] iio: adc: axp20x_adc: allow to set TS pin to GPADC
mode
The TS pin of AXP PMICs can be set to GPADC mode. In this situation, it
doesn't affect battery charging.
Add the code to do the mode setting.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
drivers/iio/adc/axp20x_adc.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/iio/adc/axp20x_adc.c b/drivers/iio/adc/axp20x_adc.c
index 53bf7d489..70136c0dd 100644
--- a/drivers/iio/adc/axp20x_adc.c
+++ b/drivers/iio/adc/axp20x_adc.c
@@ -39,6 +39,7 @@
#define AXP813_TS_GPIO0_ADC_RATE_HZ(x) AXP20X_ADC_RATE_HZ(x)
#define AXP813_V_I_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK)
#define AXP813_ADC_RATE_HZ(x) (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x))
+#define AXP20X_TS_FUNCTION_GPADC BIT(2)
#define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \
{ \
@@ -715,6 +716,11 @@ static int axp20x_probe(struct platform_device *pdev)
regmap_update_bits(info->regmap, AXP20X_ADC_EN2,
AXP20X_ADC_EN2_MASK, AXP20X_ADC_EN2_MASK);
+ if (of_property_read_bool(pdev->dev.of_node, "x-powers,ts-as-gpadc"))
+ regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
+ AXP20X_TS_FUNCTION_GPADC,
+ AXP20X_TS_FUNCTION_GPADC);
+
/* Configure ADCs rate */
info->data->adc_rate(info, 100);
--
2.35.3