177 lines
5.2 KiB
Diff
177 lines
5.2 KiB
Diff
From 046063e89d3f2676ef65cc076f4b10dae10f7b56 Mon Sep 17 00:00:00 2001
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From: Ondrej Jirman <megi@xff.cz>
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Date: Wed, 25 May 2022 22:59:18 +0200
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Subject: [PATCH 328/391] media: i2c: imx258: Fix lower modes (still broken)
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...
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Signed-off-by: Ondrej Jirman <megi@xff.cz>
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---
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drivers/media/i2c/imx258.c | 94 +++++++++++++++++++-------------------
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1 file changed, 47 insertions(+), 47 deletions(-)
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diff --git a/drivers/media/i2c/imx258.c b/drivers/media/i2c/imx258.c
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index 0639fd6a6..9bc948038 100644
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--- a/drivers/media/i2c/imx258.c
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+++ b/drivers/media/i2c/imx258.c
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@@ -187,17 +187,17 @@ static const struct imx258_reg mipi_data_rate_1267mbps[] = {
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};
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static const struct imx258_reg mipi_data_rate_640mbps[] = {
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- REG8(IVTPXCK_DIV, 0x05),
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- REG8(IVTSYCK_DIV, 0x02),
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- REG8(PREPLLCK_VT_DIV, 0x03),
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- REG16(PLL_IVT_MPY, 0x0064), // 100
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- REG8(IOPPXCK_DIV, 0x0a),
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- REG8(IOPSYCK_DIV, 0x01),
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- REG8(PREPLLCK_OP_DIV, 0x02),
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- REG16(PLL_IOP_MPY, 0x00d8), // 216
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- REG8(PLL_MULT_DRIV, 0x00),
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- REG16(REQ_LINK_BIT_RATE_MBPS_H, 0x0a00), // 2560
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- REG16(REQ_LINK_BIT_RATE_MBPS_L, 0x0000), // 0
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+ REG8(IVTPXCK_DIV, 5),
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+ REG8(IVTSYCK_DIV, 2),
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+ REG8(PREPLLCK_VT_DIV, 4),
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+ REG16(PLL_IVT_MPY, 107),
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+ REG8(IOPPXCK_DIV, 10),
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+ REG8(IOPSYCK_DIV, 1),
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+ REG8(PREPLLCK_OP_DIV, 2),
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+ REG16(PLL_IOP_MPY, 216),
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+ REG8(PLL_MULT_DRIV, 0),
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+ REG16(REQ_LINK_BIT_RATE_MBPS_H, 2568),
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+ REG16(REQ_LINK_BIT_RATE_MBPS_L, 0),
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};
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static const struct imx258_reg common_regs[] = {
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@@ -472,28 +472,28 @@ static const struct imx258_reg common_regs[] = {
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};
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static const struct imx258_reg mode_4208x3118_regs[] = {
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- REG16(CSI_DT_FMT, 0x0a0a), // 2570
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+ REG16(CSI_DT_FMT, 0x0a0a),
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REG8(CSI_LANE_MODE, 0x03),
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- REG16(LINE_LENGTH_PCK, 0x14e8), // 5352
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- REG16(FRM_LENGTH_LINES, 0x0c50), // 3152
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+ REG16(LINE_LENGTH_PCK, 5352),
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+ REG16(FRM_LENGTH_LINES, 3152),
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REG16(X_ADD_STA, 0),
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REG16(Y_ADD_STA, 0),
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REG16(X_ADD_END, 4207),
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REG16(Y_ADD_END, 3119),
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- REG8(X_EVN_INC, 0x01),
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- REG8(X_ODD_INC, 0x01),
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- REG8(Y_EVN_INC, 0x01),
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- REG8(Y_ODD_INC, 0x01),
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+ REG8(X_EVN_INC, 1),
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+ REG8(X_ODD_INC, 1),
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+ REG8(Y_EVN_INC, 1),
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+ REG8(Y_ODD_INC, 1),
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REG8(BINNING_MODE, 0x00),
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REG8(BINNING_TYPE_V, 0x11),
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REG8(SCALE_MODE, 0x00),
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- REG16(SCALE_M, 0x0010), // 16
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+ REG16(SCALE_M, 16),
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REG16(DIG_CROP_X_OFFSET, 0),
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REG16(DIG_CROP_Y_OFFSET, 0),
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REG16(DIG_CROP_IMAGE_WIDTH, 4208),
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REG16(DIG_CROP_IMAGE_HEIGHT, 3120),
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REG8(SCALE_MODE_EXT, 0x00),
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- REG16(SCALE_M_EXT, 0x0010), // 16
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+ REG16(SCALE_M_EXT, 16),
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REG8(FORCE_FD_SUM, 0x00),
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REG16(X_OUT_SIZE, 4208),
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REG16(Y_OUT_SIZE, 3120),
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@@ -532,28 +532,28 @@ static const struct imx258_reg mode_4032x3024_regs[] = {
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};
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static const struct imx258_reg mode_2104_1560_regs[] = {
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- REG16(CSI_DT_FMT, 0x0a0a), // 2570
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+ REG16(CSI_DT_FMT, 0x0a0a),
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REG8(CSI_LANE_MODE, 0x03),
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- REG16(LINE_LENGTH_PCK, 0x14e8), // 5352
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- REG16(FRM_LENGTH_LINES, 0x0638), // 1592
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+ REG16(LINE_LENGTH_PCK, 5352),
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+ REG16(FRM_LENGTH_LINES, 1592),
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REG16(X_ADD_STA, 0),
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REG16(Y_ADD_STA, 0),
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REG16(X_ADD_END, 4207),
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REG16(Y_ADD_END, 3119),
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- REG8(X_EVN_INC, 0x01),
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- REG8(X_ODD_INC, 0x01),
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- REG8(Y_EVN_INC, 0x01),
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- REG8(Y_ODD_INC, 0x01),
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+ REG8(X_EVN_INC, 1),
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+ REG8(X_ODD_INC, 1),
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+ REG8(Y_EVN_INC, 1),
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+ REG8(Y_ODD_INC, 1),
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REG8(BINNING_MODE, 0x01),
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REG8(BINNING_TYPE_V, 0x12),
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- REG8(SCALE_MODE, 0x01),
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- REG16(SCALE_M, 0x0020), // 32
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+ REG8(SCALE_MODE, 1),
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+ REG16(SCALE_M, 32),
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REG16(DIG_CROP_X_OFFSET, 2),
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REG16(DIG_CROP_Y_OFFSET, 0),
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REG16(DIG_CROP_IMAGE_WIDTH, 4208),
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REG16(DIG_CROP_IMAGE_HEIGHT, 1560),
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REG8(SCALE_MODE_EXT, 0x00),
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- REG16(SCALE_M_EXT, 0x0010), // 16
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+ REG16(SCALE_M_EXT, 16),
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REG8(FORCE_FD_SUM, 0x00),
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REG16(X_OUT_SIZE, 2104),
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REG16(Y_OUT_SIZE, 1560),
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@@ -562,33 +562,33 @@ static const struct imx258_reg mode_2104_1560_regs[] = {
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};
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static const struct imx258_reg mode_1048_780_regs[] = {
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- REG16(CSI_DT_FMT, 0x0a0a), // 2570
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+ REG16(CSI_DT_FMT, 0x0a0a),
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REG8(CSI_LANE_MODE, 0x03),
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- REG16(LINE_LENGTH_PCK, 0x14e8), // 5352
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- REG16(FRM_LENGTH_LINES, 0x034c), // 844
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- REG16(X_ADD_STA, 0x0000), // 0
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- REG16(Y_ADD_STA, 0x0000), // 0
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+ REG16(LINE_LENGTH_PCK, 5352),
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+ REG16(FRM_LENGTH_LINES, 844),
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+ REG16(X_ADD_STA, 0),
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+ REG16(Y_ADD_STA, 0),
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REG16(X_ADD_END, 4191),
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REG16(Y_ADD_END, 3119),
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- REG8(X_EVN_INC, 0x01),
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- REG8(X_ODD_INC, 0x01),
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- REG8(Y_EVN_INC, 0x01),
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- REG8(Y_ODD_INC, 0x01),
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+ REG8(X_EVN_INC, 1),
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+ REG8(X_ODD_INC, 1),
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+ REG8(Y_EVN_INC, 1),
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+ REG8(Y_ODD_INC, 1),
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REG8(BINNING_MODE, 0x01),
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REG8(BINNING_TYPE_V, 0x14),
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REG8(SCALE_MODE, 0x01),
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- REG16(SCALE_M, 0x0040), // 64
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- REG16(DIG_CROP_X_OFFSET, 0x0006), // 6
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- REG16(DIG_CROP_Y_OFFSET, 0x0000), // 0
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+ REG16(SCALE_M, 64),
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+ REG16(DIG_CROP_X_OFFSET, 6),
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+ REG16(DIG_CROP_Y_OFFSET, 0),
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REG16(DIG_CROP_IMAGE_WIDTH, 4192),
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- REG16(DIG_CROP_IMAGE_HEIGHT, 780), // 780
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+ REG16(DIG_CROP_IMAGE_HEIGHT, 780),
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REG8(SCALE_MODE_EXT, 0x00),
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- REG16(SCALE_M_EXT, 0x0010), // 16
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+ REG16(SCALE_M_EXT, 16),
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REG8(FORCE_FD_SUM, 0x00),
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- REG16(X_OUT_SIZE, 1048), // 1048
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- REG16(Y_OUT_SIZE, 780), // 780
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+ REG16(X_OUT_SIZE, 1048),
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+ REG16(Y_OUT_SIZE, 780),
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REG8(FRM_LENGTH_CTL, 0x01),
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- REG16(COARSE_INTEG_TIME, 0x0342), // 834
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+ REG16(COARSE_INTEG_TIME, 834),
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};
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static const char * const imx258_test_pattern_menu[] = {
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--
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2.35.3
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