build/patch/kernel/archive/sunxi-6.4/patches.armbian/drv-clk-sunxi-ng-ccu-sun50i-a64-revert-ccu-Pinebook-A64.patch

65 lines
2.5 KiB
Diff

From 5a11d6ca74867d866a14bd6f6e987f47df1d2630 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 14:10:52 +0300
Subject: [PATCH 030/153] drv:clk:sunxi-ng:ccu-sun50i-a64: revert ccu
Pinebook-A64
---
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index 9833ab1a1..9e5de9521 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -560,8 +560,8 @@ static SUNXI_CCU_M_WITH_MUX_GATE(de_clk, "de", de_parents,
* is required to restore the rate of TCON0 when the rate of PLL-Video0
* changed.
*/
-static const char * const tcon0_parents[] = { "pll-mipi", /* "pll-video0-2x" */ };
-static const u8 tcon0_table[] = { 0, /* 2, */ };
+static const char * const tcon0_parents[] = { "pll-mipi", "pll-video0-2x" };
+static const u8 tcon0_table[] = { 0, 2, };
static SUNXI_CCU_MUX_TABLE_WITH_GATE(tcon0_clk, "tcon0", tcon0_parents,
tcon0_table, 0x118, 24, 3, BIT(31),
CLK_SET_RATE_PARENT);
@@ -968,9 +968,9 @@ static struct ccu_mux_nb sun50i_a64_cpu_nb = {
.bypass_index = 1, /* index of 24 MHz oscillator */
};
-static struct ccu_rate_reset_nb sun50i_a64_pll_video0_reset_tcon0_nb = {
+/*static struct ccu_rate_reset_nb sun50i_a64_pll_video0_reset_tcon0_nb = {
.common = &pll_video0_clk.common,
-};
+};*/
#define CCU_MIPI_DSI_CLK 0x168
@@ -1004,9 +1004,9 @@ static int sun50i_a64_ccu_probe(struct platform_device *pdev)
}
/* Force the parent of TCON0 to PLL-MIPI */
- val = readl(reg + SUN50I_A64_TCON0_REG);
- val &= ~GENMASK(26, 24);
- writel(val | (0 << 24), reg + SUN50I_A64_TCON0_REG);
+// val = readl(reg + SUN50I_A64_TCON0_REG);
+// val &= ~GENMASK(26, 24);
+// writel(val | (0 << 24), reg + SUN50I_A64_TCON0_REG);
ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_a64_ccu_desc);
if (ret)
@@ -1020,8 +1020,8 @@ static int sun50i_a64_ccu_probe(struct platform_device *pdev)
&sun50i_a64_cpu_nb);
/* Reset the rate of TCON0 clock when PLL-VIDEO0 is changed */
- sun50i_a64_pll_video0_reset_tcon0_nb.target_clk = tcon0_clk.common.hw.clk;
- ccu_rate_reset_notifier_register(&sun50i_a64_pll_video0_reset_tcon0_nb);
+// sun50i_a64_pll_video0_reset_tcon0_nb.target_clk = tcon0_clk.common.hw.clk;
+// ccu_rate_reset_notifier_register(&sun50i_a64_pll_video0_reset_tcon0_nb);
return 0;
}
--
2.35.3