52 lines
1.5 KiB
Diff
52 lines
1.5 KiB
Diff
From 2ffd7b3674904a17799e37a1ac7d1c90cecc1983 Mon Sep 17 00:00:00 2001
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From: Detlev Casanova <detlev.casanova@collabora.com>
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Date: Mon, 29 May 2023 10:04:16 -0400
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Subject: [PATCH 434/469] net: phy: realtek: Add optional external PHY clock
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In some cases, the PHY can use an external clock source instead of a
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crystal.
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Add an optional clock in the phy node to make sure that the clock source
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is enabled, if specified, before probing.
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Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
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---
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drivers/net/phy/realtek.c | 7 +++++++
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1 file changed, 7 insertions(+)
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diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
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index 3d99fd6664d7..70c75dbbf799 100644
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--- a/drivers/net/phy/realtek.c
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+++ b/drivers/net/phy/realtek.c
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@@ -12,6 +12,7 @@
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#include <linux/phy.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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+#include <linux/clk.h>
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#define RTL821x_PHYSR 0x11
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#define RTL821x_PHYSR_DUPLEX BIT(13)
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@@ -80,6 +81,7 @@ struct rtl821x_priv {
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u16 phycr1;
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u16 phycr2;
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bool has_phycr2;
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+ struct clk *clk;
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};
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static int rtl821x_read_page(struct phy_device *phydev)
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@@ -103,6 +105,11 @@ static int rtl821x_probe(struct phy_device *phydev)
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if (!priv)
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return -ENOMEM;
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+ priv->clk = devm_clk_get_optional_enabled(dev, "xtal");
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+ if (IS_ERR(priv->clk))
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+ return dev_err_probe(dev, PTR_ERR(priv->clk),
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+ "failed to get phy xtal clock\n");
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+
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ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1);
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if (ret < 0)
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return ret;
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--
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2.34.1
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