61 lines
1.8 KiB
Diff
61 lines
1.8 KiB
Diff
From 03ae30efbdef938420c23979cd5c8b3115e19e31 Mon Sep 17 00:00:00 2001
|
|
From: =?UTF-8?q?Ond=C5=99ej=20Jirman?= <megi@xff.cz>
|
|
Date: Thu, 12 Jan 2017 16:34:57 +0100
|
|
Subject: [PATCH 001/464] clk: sunxi-ng: Set maximum P and M factors to 1 for
|
|
H3 pll-cpux clock
|
|
|
|
When using M factor greater than 1 system is experiencing
|
|
occasional lockups. P factor should only be used for clock
|
|
speeds below 288MHz. We don't use such speeds in the mainline
|
|
kernel.
|
|
|
|
This change was verified to fix lockups with PLL stress
|
|
tester available at https://xff.cz/git/arisc-firmware/.
|
|
|
|
Note that M factor must not be used outside the kernel either,
|
|
so for example u-boot needs a similar patch.
|
|
|
|
Signed-off-by: Ondrej Jirman <megi@xff.cz>
|
|
---
|
|
drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 24 +++++++++++++++---------
|
|
1 file changed, 15 insertions(+), 9 deletions(-)
|
|
|
|
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
|
|
index bfebe8dbbe65..2c8adaa157fe 100644
|
|
--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
|
|
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
|
|
@@ -25,15 +25,21 @@
|
|
|
|
#include "ccu-sun8i-h3.h"
|
|
|
|
-static SUNXI_CCU_NKMP_WITH_GATE_LOCK(pll_cpux_clk, "pll-cpux",
|
|
- "osc24M", 0x000,
|
|
- 8, 5, /* N */
|
|
- 4, 2, /* K */
|
|
- 0, 2, /* M */
|
|
- 16, 2, /* P */
|
|
- BIT(31), /* gate */
|
|
- BIT(28), /* lock */
|
|
- CLK_SET_RATE_UNGATE);
|
|
+static struct ccu_nkmp pll_cpux_clk = {
|
|
+ .enable = BIT(31),
|
|
+ .lock = BIT(28),
|
|
+ .n = _SUNXI_CCU_MULT(8, 5),
|
|
+ .k = _SUNXI_CCU_MULT(4, 2),
|
|
+ .m = _SUNXI_CCU_DIV_MAX(0, 2, 1),
|
|
+ .p = _SUNXI_CCU_DIV_MAX(16, 2, 1),
|
|
+ .common = {
|
|
+ .reg = 0x000,
|
|
+ .hw.init = CLK_HW_INIT("pll-cpux",
|
|
+ "osc24M",
|
|
+ &ccu_nkmp_ops,
|
|
+ CLK_SET_RATE_UNGATE),
|
|
+ },
|
|
+};
|
|
|
|
/*
|
|
* The Audio PLL is supposed to have 4 outputs: 3 fixed factors from
|
|
--
|
|
2.34.1
|
|
|