771 lines
18 KiB
Diff
771 lines
18 KiB
Diff
From: schwar3kat <61094841+schwar3kat@users.noreply.github.com>
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Date: Wed, 08 Jun 2022 13:47:03 +1300
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Subject: [PATCH] Add u-boot support rk3328-orangepi-r1-plus-lts
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Signed-off-by: schwar3kat <61094841+schwar3kat@users.noreply.github.com>
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---
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arch/arm/dts/Makefile | 1 +
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arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts | 607 ++++++++++++++++++
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configs/orangepi_r1_plus_lts_rk3328_defconfig | 95 +++
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drivers/net/phy/phy.c | 9 +
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3 files changed, 716 insertions(+)
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create mode 100644 arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
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create mode 100644 configs/orangepi_r1_plus_lts_rk3328_defconfig
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index becf5c9d..bc6f8b09 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -110,7 +110,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
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dtb-$(CONFIG_ROCKCHIP_RK3328) += \
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rk3328-evb.dtb \
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rk3328-nanopi-r2s.dtb \
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rk3328-orangepi-r1-plus.dtb \
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+ rk3328-orangepi-r1-plus-lts.dtb \
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rk3328-roc-cc.dtb \
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rk3328-rock64.dtb \
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rk3328-rock-pi-e.dtb
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diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
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new file mode 100644
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index 00000000..3a446b4e
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--- /dev/null
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+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
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@@ -0,0 +1,607 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited
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+ * Copyright (c) 2021 AmadeusGhost <amadeus@jmu.edu.cn>
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+ * Revised for Orange Pi R1 Plus LTS (c) 2022 schwar3kat
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+ * Based on Orange Pi R1
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+ */
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+
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+/dts-v1/;
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+#include <dt-bindings/input/linux-event-codes.h>
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+#include "rk3328.dtsi"
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+
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+/ {
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+ model = "Xunlong Orange Pi R1 Plus LTS";
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+ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
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+
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+ aliases {
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+ ethernet1 = &rtl8153;
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+ mmc0 = &sdmmc;
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+ };
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+
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+ chosen {
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+ bootargs = "swiotlb=1 coherent_pool=1m consoleblank=0";
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ gmac_clkin: external-gmac-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "gmac_clkin";
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+ #clock-cells = <0>;
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+ };
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+
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+ mach: board {
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+ compatible = "orangepi,board";
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+ machine = "ORANGEPI-R1-LTS";
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+ hwrev = <255>;
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+ model = "OrangePi R1 Series";
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+ nvmem-cells = <&efuse_id>, <&efuse_cpu_version>;
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+ nvmem-cell-names = "id", "cpu-version";
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+ };
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+
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+ leds: gpio-leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 =<&leds_gpio>;
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+ status = "disabled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ led@1 {
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+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
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+ label = "status_led";
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+ linux,default-trigger = "heartbeat";
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+ linux,default-trigger-delay-ms = <0>;
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+ };
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+ };
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+
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ clocks = <&rk805 1>;
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+ clock-names = "ext_clock";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&wifi_enable_h>;
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+
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+ /*
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+ * On the module itself this is one of these (depending
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+ * on the actual card populated):
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+ * - SDIO_RESET_L_WL_REG_ON
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+ * - PDN (power down when low)
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+ */
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+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ vcc_sd: sdmmc-regulator {
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+ compatible = "regulator-fixed";
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+ gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc0m1_pin>;
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+ regulator-name = "vcc_sd";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_io>;
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+ };
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+
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+ vccio_sd: sdmmcio-regulator {
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+ compatible = "regulator-gpio";
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+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ states = <1800000 0x1
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+ 3300000 0x0>;
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+ regulator-name = "vccio_sd";
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+ regulator-type = "voltage";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-always-on;
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+ vin-supply = <&vcc_io>;
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+ startup-delay-us = <2000>;
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+ regulator-settling-time-us = <5000>;
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+ enable-active-high;
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+ status = "disabled";
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+ };
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+
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+ vcc_sys: vcc-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ vcc_phy: vcc-phy-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_phy";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ vcc_host_vbus: host-vbus-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_host_vbus";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ dfi: dfi@ff790000 {
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+ reg = <0x00 0xff790000 0x00 0x400>;
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+ compatible = "rockchip,rk3328-dfi";
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+ rockchip,grf = <&grf>;
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+ status = "disabled";
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+ };
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&dfi {
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+ status = "okay";
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+};
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+
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+&emmc {
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+ bus-width = <8>;
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+ cap-mmc-highspeed;
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+ max-frequency = <150000000>;
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+ mmc-hs200-1_8v;
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+ no-sd;
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+ non-removable;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
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+ vmmc-supply = <&vcc_io>;
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+ vqmmc-supply = <&vcc18_emmc>;
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+ status = "okay";
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+};
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+
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+&gmac2phy {
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+ phy-supply = <&vcc_phy>;
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+ clock_in_out = "output";
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+ assigned-clocks = <&cru SCLK_MAC2PHY_SRC>;
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+ assigned-clock-rate = <50000000>;
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+ assigned-clocks = <&cru SCLK_MAC2PHY>;
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+ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
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+ status = "disabled";
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+};
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+
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+&gmac2io {
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+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
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+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
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+ clock_in_out = "input";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rgmiim1_pins>;
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+ phy-handle = <&rtl8153>;
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+ phy-mode = "rgmii";
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+ phy-supply = <&vcc_phy>;
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+ snps,reset-active-low;
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+ snps,reset-delays-us = <0 10000 30000>;
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+ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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+ snps,aal;
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+ snps,rxpbl = <0x4>;
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+ snps,txpbl = <0x4>;
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+ tx_delay = <0x24>;
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+ rx_delay = <0x18>;
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+ status = "okay";
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+
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+ mdio {
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+ compatible = "snps,dwmac-mdio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ rtl8153: phy@0 {
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+ reg = <0>;
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+ reset-assert-us = <10000>;
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+ reset-deassert-us = <30000>;
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+ /* reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; */
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+ };
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+ };
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+};
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+
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+&i2c1 {
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+ status = "okay";
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+
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+ rk805: rk805@18 {
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+ compatible = "rockchip,rk805";
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+ reg = <0x18>;
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+ interrupt-parent = <&gpio2>;
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+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
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+ #clock-cells = <1>;
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+ clock-output-names = "xin32k", "rk805-clkout2";
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int_l>;
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+ rockchip,system-power-controller;
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+ wakeup-source;
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+
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+ vcc1-supply = <&vcc_sys>;
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+ vcc2-supply = <&vcc_sys>;
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+ vcc3-supply = <&vcc_sys>;
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+ vcc4-supply = <&vcc_sys>;
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+ vcc5-supply = <&vcc_io>;
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+ vcc6-supply = <&vcc_io>;
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+
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+ regulators {
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+ vdd_logic: DCDC_REG1 {
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+ regulator-name = "vdd_logic";
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+ regulator-init-microvolt = <1075000>;
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+ regulator-min-microvolt = <712500>;
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+ regulator-max-microvolt = <1450000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1000000>;
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+ };
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+ };
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+
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+ vdd_arm: DCDC_REG2 {
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+ regulator-name = "vdd_arm";
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+ regulator-init-microvolt = <1225000>;
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+ regulator-min-microvolt = <712500>;
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+ regulator-max-microvolt = <1450000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <950000>;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-name = "vcc_ddr";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vcc_io: DCDC_REG4 {
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+ regulator-name = "vcc_io";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcc_18: LDO_REG1 {
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+ regulator-name = "vcc_18";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vcc18_emmc: LDO_REG2 {
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+ regulator-name = "vcc18_emmc";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vdd_10: LDO_REG3 {
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+ regulator-name = "vdd_10";
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+ regulator-min-microvolt = <1000000>;
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+ regulator-max-microvolt = <1000000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1000000>;
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+ };
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+ };
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+ };
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+ };
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+};
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+
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+&io_domains {
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+ status = "okay";
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+
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+ vccio1-supply = <&vcc_io>;
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+ vccio2-supply = <&vcc18_emmc>;
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+ vccio3-supply = <&vcc_io>;
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+ vccio4-supply = <&vcc_io>;
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+ vccio5-supply = <&vcc_io>;
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+ vccio6-supply = <&vcc_18>;
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+ pmuio-supply = <&vcc_io>;
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+};
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+
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+&pinctrl {
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+ pmic {
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+ pmic_int_l: pmic-int-l {
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+ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+
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+ sdio-pwrseq {
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+ wifi_enable_h: wifi-enable-h {
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+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ sdmmc0 {
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+ sdmmc0_clk: sdmmc0-clk {
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+ rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_4ma>;
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+ };
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+
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+ sdmmc0_cmd: sdmmc0-cmd {
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+ rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_4ma>;
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+ };
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+
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+ sdmmc0_dectn: sdmmc0-dectn {
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+ rockchip,pins = <1 RK_PA5 1 &pcfg_pull_up_4ma>;
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+ };
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+
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+ sdmmc0_bus4: sdmmc0-bus4 {
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+ rockchip,pins =
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+ <1 RK_PA0 1 &pcfg_pull_up_4ma>,
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+ <1 RK_PA1 1 &pcfg_pull_up_4ma>,
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+ <1 RK_PA2 1 &pcfg_pull_up_4ma>,
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+ <1 RK_PA3 1 &pcfg_pull_up_4ma>;
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+ };
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+ };
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+
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+ sdmmc0ext {
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+ sdmmc0ext_clk: sdmmc0ext-clk {
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+ rockchip,pins = <3 RK_PA2 3 &pcfg_pull_none_2ma>;
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+ };
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+
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+ sdmmc0ext_cmd: sdmmc0ext-cmd {
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+ rockchip,pins = <3 RK_PA0 3 &pcfg_pull_up_2ma>;
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+ };
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+
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+ sdmmc0ext_bus4: sdmmc0ext-bus4 {
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+ rockchip,pins =
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+ <3 RK_PA4 3 &pcfg_pull_up_2ma>,
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+ <3 RK_PA5 3 &pcfg_pull_up_2ma>,
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+ <3 RK_PA6 3 &pcfg_pull_up_2ma>,
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+ <3 RK_PA7 3 &pcfg_pull_up_2ma>;
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+ };
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+ };
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+
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+ gmac-1 {
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+ rgmiim1_pins: rgmiim1-pins {
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+ rockchip,pins =
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+ /* mac_txclk */
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+ <1 RK_PB4 2 &pcfg_pull_none_4ma>,
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+ /* mac_rxclk */
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+ <1 RK_PB5 2 &pcfg_pull_none>,
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+ /* mac_mdio */
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+ <1 RK_PC3 2 &pcfg_pull_none_2ma>,
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+ /* mac_txen */
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+ <1 RK_PD1 2 &pcfg_pull_none_4ma>,
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+ /* mac_clk */
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+ <1 RK_PC5 2 &pcfg_pull_none_2ma>,
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+ /* mac_rxdv */
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+ <1 RK_PC6 2 &pcfg_pull_none>,
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+ /* mac_mdc */
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+ <1 RK_PC7 2 &pcfg_pull_none_2ma>,
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+ /* mac_rxd1 */
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+ <1 RK_PB2 2 &pcfg_pull_none>,
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+ /* mac_rxd0 */
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+ <1 RK_PB3 2 &pcfg_pull_none>,
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+ /* mac_txd1 */
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+ <1 RK_PB0 2 &pcfg_pull_none_4ma>,
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+ /* mac_txd0 */
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+ <1 RK_PB1 2 &pcfg_pull_none_4ma>,
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+ /* mac_rxd3 */
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+ <1 RK_PB6 2 &pcfg_pull_none>,
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+ /* mac_rxd2 */
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+ <1 RK_PB7 2 &pcfg_pull_none>,
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+ /* mac_txd3 */
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+ <1 RK_PC0 2 &pcfg_pull_none_4ma>,
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+ /* mac_txd2 */
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+ <1 RK_PC1 2 &pcfg_pull_none_4ma>,
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+
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+ /* mac_txclk */
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+ <0 RK_PB0 1 &pcfg_pull_none>,
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+ /* mac_txen */
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+ <0 RK_PB4 1 &pcfg_pull_none>,
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+ /* mac_clk */
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+ <0 RK_PD0 1 &pcfg_pull_none>,
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+ /* mac_txd1 */
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+ <0 RK_PC0 1 &pcfg_pull_none>,
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+ /* mac_txd0 */
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+ <0 RK_PC1 1 &pcfg_pull_none>,
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|
+ /* mac_txd3 */
|
|
+ <0 RK_PC7 1 &pcfg_pull_none>,
|
|
+ /* mac_txd2 */
|
|
+ <0 RK_PC6 1 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb {
|
|
+ host_vbus_drv: host-vbus-drv {
|
|
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ otg_vbus_drv: otg-vbus-drv {
|
|
+ rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ leds_gpio: leds-gpio {
|
|
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&sdmmc {
|
|
+ bus-width = <4>;
|
|
+ cap-mmc-highspeed;
|
|
+ cap-sd-highspeed;
|
|
+ disable-wp;
|
|
+ max-frequency = <150000000>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
|
|
+ vmmc-supply = <&vcc_sd>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ status = "okay";
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ autorepeat;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gpio_key1>;
|
|
+
|
|
+ button@0 {
|
|
+ reg = <0>;
|
|
+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
|
|
+ label = "reset";
|
|
+ linux,code = <BTN_1>;
|
|
+ linux,input-type = <1>;
|
|
+ gpio-key,wakeup = <1>;
|
|
+ debounce-interval = <100>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_rtl8153: vcc-rtl8153-regulator {
|
|
+ compatible = "regulator-fixed";
|
|
+ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&usb30_en_drv>;
|
|
+ regulator-always-on;
|
|
+ regulator-name = "vcc_rtl8153";
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ off-on-delay-us = <5000>;
|
|
+ enable-active-high;
|
|
+ };
|
|
+};
|
|
+
|
|
+
|
|
+&emmc {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&i2c0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ status = "okay";
|
|
+
|
|
+ led@2 {
|
|
+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
|
|
+ label = "lan_led";
|
|
+ reg = <0>;
|
|
+ };
|
|
+
|
|
+ led@3 {
|
|
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
|
|
+ label = "wan_led";
|
|
+ reg = <0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&leds_gpio {
|
|
+ rockchip,pins =
|
|
+ <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,
|
|
+ <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
|
|
+ <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+};
|
|
+
|
|
+&rk805 {
|
|
+ interrupt-parent = <&gpio1>;
|
|
+ interrupts = <RK_PD0 IRQ_TYPE_LEVEL_LOW>;
|
|
+};
|
|
+
|
|
+&vccio_sd {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&io_domains {
|
|
+ vccio3-supply = <&vccio_sd>;
|
|
+};
|
|
+
|
|
+&sdmmc {
|
|
+ vqmmc-supply = <&vccio_sd>;
|
|
+ max-frequency = <150000000>;
|
|
+ sd-uhs-sdr50;
|
|
+ sd-uhs-sdr104;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdio_pwrseq {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ pmic {
|
|
+ pmic_int_l: pmic-int-l {
|
|
+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pwm {
|
|
+ pwm2_sleep_pin: pwm2-sleep-pin {
|
|
+ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_output_low>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rockchip-key {
|
|
+ gpio_key1: gpio-key1 {
|
|
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb {
|
|
+ otg_vbus_drv: otg-vbus-drv {
|
|
+ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ usb30_en_drv: usb30-en-drv {
|
|
+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&leds_gpio {
|
|
+ rockchip,pins =
|
|
+ <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
|
|
+ <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
|
|
+ <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ led@1 {
|
|
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
|
+ reg = <0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ status = "okay";
|
|
+
|
|
+ spiflash@0 {
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <10000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
diff --git a/configs/orangepi_r1_plus_lts_rk3328_defconfig b/configs/orangepi_r1_plus_lts_rk3328_defconfig
|
|
new file mode 100644
|
|
index 000000000..627797f91
|
|
--- /dev/null
|
|
+++ b/configs/orangepi_r1_plus_lts_rk3328_defconfig
|
|
@@ -0,0 +1,99 @@
|
|
+CONFIG_ARM=y
|
|
+CONFIG_SKIP_LOWLEVEL_INIT=y
|
|
+CONFIG_ARCH_ROCKCHIP=y
|
|
+CONFIG_SYS_TEXT_BASE=0x00200000
|
|
+CONFIG_ROCKCHIP_RK3328=y
|
|
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
|
|
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
|
|
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
|
|
+#CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
|
+CONFIG_SPL_DRIVERS_MISC=y
|
|
+CONFIG_ENV_OFFSET=0x3F8000
|
|
+CONFIG_SPL_STACK_R_ADDR=0x600000
|
|
+CONFIG_NR_DRAM_BANKS=1
|
|
+CONFIG_DEBUG_UART_BASE=0xFF130000
|
|
+CONFIG_DEBUG_UART_CLOCK=24000000
|
|
+CONFIG_SMBIOS_PRODUCT_NAME="rock64_rk3328"
|
|
+CONFIG_DEBUG_UART=y
|
|
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
|
|
+CONFIG_SYS_LOAD_ADDR=0x800800
|
|
+# CONFIG_ANDROID_BOOT_IMAGE is not set
|
|
+CONFIG_FIT=y
|
|
+CONFIG_FIT_VERBOSE=y
|
|
+CONFIG_SPL_LOAD_FIT=y
|
|
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb"
|
|
+CONFIG_MISC_INIT_R=y
|
|
+# CONFIG_DISPLAY_CPUINFO is not set
|
|
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
|
|
+CONFIG_SPL_STACK_R=y
|
|
+CONFIG_SPL_ATF=y
|
|
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
|
|
+CONFIG_CMD_BOOTZ=y
|
|
+CONFIG_CMD_GPT=y
|
|
+CONFIG_CMD_MMC=y
|
|
+CONFIG_CMD_USB=y
|
|
+# CONFIG_CMD_SETEXPR is not set
|
|
+CONFIG_CMD_TIME=y
|
|
+CONFIG_SPL_OF_CONTROL=y
|
|
+CONFIG_TPL_OF_CONTROL=y
|
|
+CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts"
|
|
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
+CONFIG_TPL_OF_PLATDATA=y
|
|
+CONFIG_ENV_IS_IN_MMC=y
|
|
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
+CONFIG_NET_RANDOM_ETHADDR=y
|
|
+CONFIG_TPL_DM=y
|
|
+CONFIG_REGMAP=y
|
|
+CONFIG_SPL_REGMAP=y
|
|
+CONFIG_TPL_REGMAP=y
|
|
+CONFIG_SYSCON=y
|
|
+CONFIG_SPL_SYSCON=y
|
|
+CONFIG_TPL_SYSCON=y
|
|
+CONFIG_CLK=y
|
|
+CONFIG_SPL_CLK=y
|
|
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
|
|
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
|
+CONFIG_ROCKCHIP_GPIO=y
|
|
+CONFIG_SYS_I2C_ROCKCHIP=y
|
|
+CONFIG_MMC_DW=y
|
|
+CONFIG_MMC_DW_ROCKCHIP=y
|
|
+CONFIG_SF_DEFAULT_SPEED=20000000
|
|
+CONFIG_DM_ETH=y
|
|
+CONFIG_ETH_DESIGNWARE=y
|
|
+CONFIG_GMAC_ROCKCHIP=y
|
|
+CONFIG_PHY=y
|
|
+CONFIG_PINCTRL=y
|
|
+CONFIG_SPL_PINCTRL=y
|
|
+CONFIG_DM_PMIC=y
|
|
+CONFIG_PMIC_RK8XX=y
|
|
+CONFIG_SPL_PMIC_RK8XX=y
|
|
+CONFIG_REGULATOR_PWM=y
|
|
+CONFIG_DM_REGULATOR_FIXED=y
|
|
+CONFIG_REGULATOR_RK8XX=y
|
|
+CONFIG_PWM_ROCKCHIP=y
|
|
+CONFIG_RAM=y
|
|
+CONFIG_SPL_RAM=y
|
|
+CONFIG_TPL_RAM=y
|
|
+CONFIG_DM_RESET=y
|
|
+CONFIG_BAUDRATE=1500000
|
|
+CONFIG_DEBUG_UART_SHIFT=2
|
|
+CONFIG_SYSRESET=y
|
|
+# CONFIG_TPL_SYSRESET is not set
|
|
+CONFIG_USB=y
|
|
+CONFIG_USB_XHCI_HCD=y
|
|
+CONFIG_USB_XHCI_DWC3=y
|
|
+CONFIG_USB_EHCI_HCD=y
|
|
+CONFIG_USB_EHCI_GENERIC=y
|
|
+CONFIG_USB_OHCI_HCD=y
|
|
+CONFIG_USB_OHCI_GENERIC=y
|
|
+CONFIG_USB_DWC2=y
|
|
+CONFIG_USB_DWC3=y
|
|
+# CONFIG_USB_DWC3_GADGET is not set
|
|
+CONFIG_USB_GADGET=y
|
|
+CONFIG_USB_GADGET_DWC2_OTG=y
|
|
+CONFIG_SPL_TINY_MEMSET=y
|
|
+CONFIG_TPL_TINY_MEMSET=y
|
|
+CONFIG_ERRNO_STR=y
|
|
+CONFIG_SMBIOS_MANUFACTURER="rockchip64"
|
|
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
|
|
index ed197fa4..6a14eada 100644
|
|
--- a/drivers/net/phy/phy.c
|
|
+++ b/drivers/net/phy/phy.c
|
|
@@ -648,6 +648,8 @@ static struct phy_driver *generic_for_phy(struct phy_device *phydev)
|
|
return &genphy_driver;
|
|
}
|
|
|
|
+#define YT_8531C_PHY_ID 0x4f51e91b
|
|
+
|
|
static struct phy_driver *get_phy_driver(struct phy_device *phydev)
|
|
{
|
|
struct list_head *entry;
|
|
@@ -646,6 +651,10 @@ static struct phy_driver *get_phy_driver(struct phy_device *phydev,
|
|
int phy_id = phydev->phy_id;
|
|
struct phy_driver *drv = NULL;
|
|
|
|
+ if (phy_id == YT_8531C_PHY_ID)
|
|
+ env_set("ethernet_phy", "yt8531c");
|
|
+ else
|
|
+ env_set("ethernet_phy", "rtl8211f");
|
|
list_for_each(entry, &phy_drivers) {
|
|
drv = list_entry(entry, struct phy_driver, list);
|
|
if ((drv->uid & drv->mask) == (phy_id & drv->mask))
|