915 lines
22 KiB
Diff
915 lines
22 KiB
Diff
From f051544daa4dd8039b30f9a10ee509a65ba26147 Mon Sep 17 00:00:00 2001
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From: Paolo Sabatino <paolo.sabatino@gmail.com>
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Date: Sat, 7 Jan 2023 11:59:47 +0000
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Subject: [PATCH] rockchip64: consolidate nanopi r2s device trees
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---
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.../dts/rockchip/rk3328-nanopi-r2-rev00.dts | 126 +++++
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.../dts/rockchip/rk3328-nanopi-r2-rev20.dts | 39 ++
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.../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 493 ++++++++++++------
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3 files changed, 490 insertions(+), 168 deletions(-)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-rev00.dts
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-rev20.dts
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diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-rev00.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-rev00.dts
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new file mode 100644
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index 00000000000..8ba95189c03
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-rev00.dts
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@@ -0,0 +1,126 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2019 FriendlyElec Computer Tech. Co., Ltd.
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+ * (http://www.friendlyarm.com)
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+ */
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+
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+/dts-v1/;
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+#include <dt-bindings/input/linux-event-codes.h>
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+#include "rk3328-nanopi-r2s.dts"
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+
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+/ {
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+ model = "FriendlyElec NanoPi R2S";
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+ compatible = "friendlyelec,nanopi-r2", "rockchip,rk3328";
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+
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+ gpio-keys {
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+ compatible = "gpio-keys";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ autorepeat;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&gpio_key1>;
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+
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+ button@0 {
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+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
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+ label = "reset";
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+ linux,code = <BTN_1>;
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+ linux,input-type = <1>;
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+ gpio-key,wakeup = <1>;
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+ debounce-interval = <100>;
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+ };
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+ };
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+
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+ vcc_rtl8153: vcc-rtl8153-regulator {
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+ compatible = "regulator-fixed";
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+ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&usb30_en_drv>;
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+ regulator-always-on;
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+ regulator-name = "vcc_rtl8153";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ off-on-delay-us = <5000>;
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+ enable-active-high;
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+ };
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+};
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+
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+&mach {
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+ hwrev = <0>;
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+ model = "NanoPi R2S";
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+};
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+
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+&emmc {
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+ status = "disabled";
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+};
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+
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+&leds {
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+ status = "okay";
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+
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+ led@2 {
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+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
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+ label = "lan_led";
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+ };
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+
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+ led@3 {
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+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
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+ label = "wan_led";
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+ };
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+};
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+
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+&rk805 {
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+ interrupt-parent = <&gpio1>;
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+ interrupts = <RK_PD0 IRQ_TYPE_LEVEL_LOW>;
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+};
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+
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+&vccio_sd {
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+ status = "okay";
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+};
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+
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+&io_domains {
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+ vccio3-supply = <&vccio_sd>;
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+};
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+
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+&sdmmc {
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+ vqmmc-supply = <&vccio_sd>;
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+ max-frequency = <150000000>;
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+ sd-uhs-sdr50;
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+ sd-uhs-sdr104;
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+ status = "okay";
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+};
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+
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+&sdmmc_ext {
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+ status = "disabled";
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+};
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+
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+&sdio_pwrseq {
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+ status = "disabled";
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+};
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+
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+&pinctrl {
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+ pmic {
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+ pmic_int_l: pmic-int-l {
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+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+
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+ rockchip-key {
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+ gpio_key1: gpio-key1 {
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+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ usb {
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+ otg_vbus_drv: otg-vbus-drv {
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+ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ usb30_en_drv: usb30-en-drv {
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+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+};
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diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-rev20.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-rev20.dts
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new file mode 100644
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index 00000000000..ad327ca5685
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2-rev20.dts
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@@ -0,0 +1,39 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2019 FriendlyElec Computer Tech. Co., Ltd.
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+ * (http://www.friendlyarm.com)
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+ */
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+
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+/dts-v1/;
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+#include "rk3328-nanopi-r2s.dts"
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+
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+/ {
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+ model = "FriendlyElec NanoPi R2";
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+ compatible = "friendlyelec,nanopi-r2", "rockchip,rk3328";
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+};
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+
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+&mach {
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+ hwrev = <0x20>;
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+ model = "NanoPi R2";
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+};
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+
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+&gmac2io {
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+ pinctrl-0 = <&rgmiim1_pins>, <&phy_intb>, <&phy_rstb>;
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+};
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+
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+&rtl8211e {
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+ interrupt-parent = <&gpio1>;
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+ interrupts = <RK_PD0 IRQ_TYPE_LEVEL_LOW>;
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+};
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+
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+&pinctrl {
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+ phy {
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+ phy_intb: phy-intb {
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+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ phy_rstb: phy-rstb {
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+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+};
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diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
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index 1445b879ac7..7fff7ef89d9 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
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@@ -1,118 +1,166 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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- * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
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+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
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+ * (http://www.friendlyarm.com)
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+ *
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+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
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*/
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/dts-v1/;
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-
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-#include <dt-bindings/input/input.h>
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-#include <dt-bindings/gpio/gpio.h>
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+#include "rk3328-dram-default-timing.dtsi"
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#include "rk3328.dtsi"
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/ {
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- model = "FriendlyElec NanoPi R2S";
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- compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
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+ model = "FriendlyElec boards based on Rockchip RK3328";
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+ compatible = "friendlyelec,nanopi-r2",
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+ "rockchip,rk3328";
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aliases {
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- ethernet1 = &rtl8153;
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- mmc0 = &sdmmc;
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+ ethernet1 = &r8153;
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};
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chosen {
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+ bootargs = "swiotlb=1 coherent_pool=1m consoleblank=0";
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stdout-path = "serial2:1500000n8";
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};
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- gmac_clk: gmac-clock {
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+ gmac_clkin: external-gmac-clock {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "gmac_clkin";
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#clock-cells = <0>;
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};
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- keys {
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- compatible = "gpio-keys";
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- pinctrl-0 = <&reset_button_pin>;
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- pinctrl-names = "default";
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-
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- key-reset {
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- label = "reset";
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- gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
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- linux,code = <KEY_RESTART>;
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- debounce-interval = <50>;
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- };
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+ mach: board {
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+ compatible = "friendlyelec,board";
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+ machine = "NANOPI-R2";
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+ hwrev = <255>;
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+ model = "NanoPi R2 Series";
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+ nvmem-cells = <&efuse_id>, <&efuse_cpu_version>;
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+ nvmem-cell-names = "id", "cpu-version";
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};
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- leds {
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+ leds: gpio-leds {
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compatible = "gpio-leds";
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- pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
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pinctrl-names = "default";
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+ pinctrl-0 =<&leds_gpio>;
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+ status = "disabled";
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- lan_led: led-0 {
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- gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
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- label = "nanopi-r2s:green:lan";
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- };
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-
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- sys_led: led-1 {
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+ led@1 {
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gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
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- label = "nanopi-r2s:red:sys";
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- default-state = "on";
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- };
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-
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- wan_led: led-2 {
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- gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
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- label = "nanopi-r2s:green:wan";
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+ label = "status_led";
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+ linux,default-trigger = "heartbeat";
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+ linux,default-trigger-delay-ms = <0>;
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};
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};
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- vcc_io_sdio: sdmmcio-regulator {
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- compatible = "regulator-gpio";
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- enable-active-high;
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- gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
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- pinctrl-0 = <&sdio_vcc_pin>;
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ clocks = <&rk805 1>;
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+ clock-names = "ext_clock";
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pinctrl-names = "default";
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- regulator-name = "vcc_io_sdio";
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- regulator-always-on;
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- regulator-min-microvolt = <1800000>;
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- regulator-max-microvolt = <3300000>;
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- regulator-settling-time-us = <5000>;
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- regulator-type = "voltage";
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- startup-delay-us = <2000>;
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- states = <1800000 0x1>,
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- <3300000 0x0>;
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- vin-supply = <&vcc_io_33>;
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+ pinctrl-0 = <&wifi_enable_h>;
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+
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+ /*
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+ * On the module itself this is one of these (depending
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+ * on the actual card populated):
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+ * - SDIO_RESET_L_WL_REG_ON
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+ * - PDN (power down when low)
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+ */
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+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ sdmmc_ext: dwmmc@ff5f0000 {
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+ compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
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+ reg = <0x0 0xff5f0000 0x0 0x4000>;
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+ clock-freq-min-max = <400000 150000000>;
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+ clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>,
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+ <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>;
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+ clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
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+ fifo-depth = <0x100>;
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+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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+ status = "disabled";
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};
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vcc_sd: sdmmc-regulator {
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compatible = "regulator-fixed";
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- gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
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- pinctrl-0 = <&sdmmc0m1_pin>;
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+ gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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- regulator-name = "vcc_sd";
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+ pinctrl-0 = <&sdmmc0m1_pin>;
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regulator-boot-on;
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+ regulator-name = "vcc_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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- vin-supply = <&vcc_io_33>;
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+ vin-supply = <&vcc_io>;
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};
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- vdd_5v: vdd-5v {
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+ vccio_sd: sdmmcio-regulator {
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+ compatible = "regulator-gpio";
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+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ states = <1800000 0x1
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+ 3300000 0x0>;
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+ regulator-name = "vccio_sd";
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+ regulator-type = "voltage";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-always-on;
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+ vin-supply = <&vcc_io>;
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+ startup-delay-us = <2000>;
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+ regulator-settling-time-us = <5000>;
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+ enable-active-high;
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+ status = "disabled";
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+ };
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+
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+ vcc_sys: vcc-sys {
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compatible = "regulator-fixed";
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- regulator-name = "vdd_5v";
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+ regulator-name = "vcc_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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- vdd_5v_lan: vdd-5v-lan {
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+ vcc_phy: vcc-phy-regulator {
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compatible = "regulator-fixed";
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- enable-active-high;
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- gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
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- pinctrl-0 = <&lan_vdd_pin>;
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- pinctrl-names = "default";
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- regulator-name = "vdd_5v_lan";
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+ regulator-name = "vcc_phy";
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regulator-always-on;
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regulator-boot-on;
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- vin-supply = <&vdd_5v>;
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+ };
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+
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+ vcc_host_vbus: host-vbus-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_host_vbus";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ /delete-node/ dmc-opp-table;
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+
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+ dmc_opp_table: dmc_opp_table {
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+ compatible = "operating-points-v2";
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+
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+ opp-786000000 {
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+ opp-hz = /bits/ 64 <786000000>;
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+ opp-microvolt = <1075000 1075000 1200000>;
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+ };
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+ opp-798000000 {
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+ opp-hz = /bits/ 64 <798000000>;
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+ opp-microvolt = <1075000 1075000 1200000>;
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+ };
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+ opp-840000000 {
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+ opp-hz = /bits/ 64 <840000000>;
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+ opp-microvolt = <1075000 1075000 1200000>;
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+ };
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+ opp-924000000 {
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+ opp-hz = /bits/ 64 <924000000>;
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+ opp-microvolt = <1100000 1100000 1200000>;
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+ };
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+ opp-1056000000 {
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+ opp-hz = /bits/ 64 <1056000000>;
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+ opp-microvolt = <1175000 1175000 1200000>;
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+ };
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};
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};
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@@ -120,34 +168,57 @@ &cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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-&cpu1 {
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- cpu-supply = <&vdd_arm>;
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+&dfi {
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+ status = "okay";
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};
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-&cpu2 {
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- cpu-supply = <&vdd_arm>;
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+&dmc {
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+ center-supply = <&vdd_logic>;
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+ ddr_timing = <&ddr_timing>;
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+ status = "okay";
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};
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-&cpu3 {
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- cpu-supply = <&vdd_arm>;
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+&emmc {
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+ bus-width = <8>;
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+ cap-mmc-highspeed;
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+ max-frequency = <150000000>;
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+ mmc-hs200-1_8v;
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+ no-sd;
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+ non-removable;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
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+ vmmc-supply = <&vcc_io>;
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+ vqmmc-supply = <&vcc18_emmc>;
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+ status = "okay";
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};
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-&display_subsystem {
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+&gmac2phy {
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+ phy-supply = <&vcc_phy>;
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+ clock_in_out = "output";
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|
+ assigned-clocks = <&cru SCLK_MAC2PHY_SRC>;
|
|
+ assigned-clock-rate = <50000000>;
|
|
+ assigned-clocks = <&cru SCLK_MAC2PHY>;
|
|
+ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
|
|
status = "disabled";
|
|
};
|
|
|
|
&gmac2io {
|
|
assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
|
|
- assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
|
|
+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
|
|
clock_in_out = "input";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rgmiim1_pins>;
|
|
phy-handle = <&rtl8211e>;
|
|
phy-mode = "rgmii";
|
|
- phy-supply = <&vcc_io_33>;
|
|
- pinctrl-0 = <&rgmiim1_pins>;
|
|
- pinctrl-names = "default";
|
|
- rx_delay = <0x18>;
|
|
+ phy-supply = <&vcc_phy>;
|
|
+ snps,reset-active-low;
|
|
+ snps,reset-delays-us = <0 10000 30000>;
|
|
+ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
|
snps,aal;
|
|
+ snps,rxpbl = <0x4>;
|
|
+ snps,txpbl = <0x4>;
|
|
tx_delay = <0x24>;
|
|
+ rx_delay = <0x18>;
|
|
status = "okay";
|
|
|
|
mdio {
|
|
@@ -155,13 +226,11 @@ mdio {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
- rtl8211e: ethernet-phy@1 {
|
|
- reg = <1>;
|
|
- pinctrl-0 = <ð_phy_reset_pin>;
|
|
- pinctrl-names = "default";
|
|
+ rtl8211e: phy@0 {
|
|
+ reg = <0>;
|
|
reset-assert-us = <10000>;
|
|
- reset-deassert-us = <50000>;
|
|
- reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
|
+ reset-deassert-us = <30000>;
|
|
+ /* reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; */
|
|
};
|
|
};
|
|
};
|
|
@@ -169,36 +238,35 @@ rtl8211e: ethernet-phy@1 {
|
|
&i2c1 {
|
|
status = "okay";
|
|
|
|
- rk805: pmic@18 {
|
|
+ rk805: rk805@18 {
|
|
compatible = "rockchip,rk805";
|
|
reg = <0x18>;
|
|
- interrupt-parent = <&gpio1>;
|
|
- interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
|
|
+ interrupt-parent = <&gpio2>;
|
|
+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
|
|
#clock-cells = <1>;
|
|
clock-output-names = "xin32k", "rk805-clkout2";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
- pinctrl-0 = <&pmic_int_l>;
|
|
pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pmic_int_l>;
|
|
rockchip,system-power-controller;
|
|
wakeup-source;
|
|
|
|
- vcc1-supply = <&vdd_5v>;
|
|
- vcc2-supply = <&vdd_5v>;
|
|
- vcc3-supply = <&vdd_5v>;
|
|
- vcc4-supply = <&vdd_5v>;
|
|
- vcc5-supply = <&vcc_io_33>;
|
|
- vcc6-supply = <&vdd_5v>;
|
|
+ vcc1-supply = <&vcc_sys>;
|
|
+ vcc2-supply = <&vcc_sys>;
|
|
+ vcc3-supply = <&vcc_sys>;
|
|
+ vcc4-supply = <&vcc_sys>;
|
|
+ vcc5-supply = <&vcc_io>;
|
|
+ vcc6-supply = <&vcc_io>;
|
|
|
|
regulators {
|
|
- vdd_log: DCDC_REG1 {
|
|
- regulator-name = "vdd_log";
|
|
- regulator-always-on;
|
|
- regulator-boot-on;
|
|
+ vdd_logic: DCDC_REG1 {
|
|
+ regulator-name = "vdd_logic";
|
|
+ regulator-init-microvolt = <1075000>;
|
|
regulator-min-microvolt = <712500>;
|
|
regulator-max-microvolt = <1450000>;
|
|
- regulator-ramp-delay = <12500>;
|
|
-
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1000000>;
|
|
@@ -207,12 +275,11 @@ regulator-state-mem {
|
|
|
|
vdd_arm: DCDC_REG2 {
|
|
regulator-name = "vdd_arm";
|
|
- regulator-always-on;
|
|
- regulator-boot-on;
|
|
+ regulator-init-microvolt = <1225000>;
|
|
regulator-min-microvolt = <712500>;
|
|
regulator-max-microvolt = <1450000>;
|
|
- regulator-ramp-delay = <12500>;
|
|
-
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <950000>;
|
|
@@ -223,19 +290,17 @@ vcc_ddr: DCDC_REG3 {
|
|
regulator-name = "vcc_ddr";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
-
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
- vcc_io_33: DCDC_REG4 {
|
|
- regulator-name = "vcc_io_33";
|
|
- regulator-always-on;
|
|
- regulator-boot-on;
|
|
+ vcc_io: DCDC_REG4 {
|
|
+ regulator-name = "vcc_io";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
-
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
@@ -244,11 +309,10 @@ regulator-state-mem {
|
|
|
|
vcc_18: LDO_REG1 {
|
|
regulator-name = "vcc_18";
|
|
- regulator-always-on;
|
|
- regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
-
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
@@ -257,11 +321,10 @@ regulator-state-mem {
|
|
|
|
vcc18_emmc: LDO_REG2 {
|
|
regulator-name = "vcc18_emmc";
|
|
- regulator-always-on;
|
|
- regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
-
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
@@ -270,11 +333,10 @@ regulator-state-mem {
|
|
|
|
vdd_10: LDO_REG3 {
|
|
regulator-name = "vdd_10";
|
|
- regulator-always-on;
|
|
- regulator-boot-on;
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
-
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1000000>;
|
|
@@ -285,84 +347,183 @@ regulator-state-mem {
|
|
};
|
|
|
|
&io_domains {
|
|
- pmuio-supply = <&vcc_io_33>;
|
|
- vccio1-supply = <&vcc_io_33>;
|
|
- vccio2-supply = <&vcc18_emmc>;
|
|
- vccio3-supply = <&vcc_io_sdio>;
|
|
- vccio4-supply = <&vcc_18>;
|
|
- vccio5-supply = <&vcc_io_33>;
|
|
- vccio6-supply = <&vcc_io_33>;
|
|
status = "okay";
|
|
+
|
|
+ vccio1-supply = <&vcc_io>;
|
|
+ vccio2-supply = <&vcc18_emmc>;
|
|
+ vccio3-supply = <&vcc_io>;
|
|
+ vccio4-supply = <&vcc_io>;
|
|
+ vccio5-supply = <&vcc_io>;
|
|
+ vccio6-supply = <&vcc_18>;
|
|
+ pmuio-supply = <&vcc_io>;
|
|
};
|
|
|
|
&pinctrl {
|
|
- button {
|
|
- reset_button_pin: reset-button-pin {
|
|
- rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ pmic {
|
|
+ pmic_int_l: pmic-int-l {
|
|
+ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
- gmac2io {
|
|
- eth_phy_reset_pin: eth-phy-reset-pin {
|
|
- rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
+ sdio-pwrseq {
|
|
+ wifi_enable_h: wifi-enable-h {
|
|
+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
- leds {
|
|
- lan_led_pin: lan-led-pin {
|
|
- rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ sdmmc0 {
|
|
+ sdmmc0_clk: sdmmc0-clk {
|
|
+ rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_4ma>;
|
|
};
|
|
|
|
- sys_led_pin: sys-led-pin {
|
|
- rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ sdmmc0_cmd: sdmmc0-cmd {
|
|
+ rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_4ma>;
|
|
};
|
|
|
|
- wan_led_pin: wan-led-pin {
|
|
- rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ sdmmc0_dectn: sdmmc0-dectn {
|
|
+ rockchip,pins = <1 RK_PA5 1 &pcfg_pull_up_4ma>;
|
|
+ };
|
|
+
|
|
+ sdmmc0_bus4: sdmmc0-bus4 {
|
|
+ rockchip,pins =
|
|
+ <1 RK_PA0 1 &pcfg_pull_up_4ma>,
|
|
+ <1 RK_PA1 1 &pcfg_pull_up_4ma>,
|
|
+ <1 RK_PA2 1 &pcfg_pull_up_4ma>,
|
|
+ <1 RK_PA3 1 &pcfg_pull_up_4ma>;
|
|
};
|
|
};
|
|
|
|
- lan {
|
|
- lan_vdd_pin: lan-vdd-pin {
|
|
- rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ sdmmc0ext {
|
|
+ sdmmc0ext_clk: sdmmc0ext-clk {
|
|
+ rockchip,pins = <3 RK_PA2 3 &pcfg_pull_none_2ma>;
|
|
+ };
|
|
+
|
|
+ sdmmc0ext_cmd: sdmmc0ext-cmd {
|
|
+ rockchip,pins = <3 RK_PA0 3 &pcfg_pull_up_2ma>;
|
|
+ };
|
|
+
|
|
+ sdmmc0ext_bus4: sdmmc0ext-bus4 {
|
|
+ rockchip,pins =
|
|
+ <3 RK_PA4 3 &pcfg_pull_up_2ma>,
|
|
+ <3 RK_PA5 3 &pcfg_pull_up_2ma>,
|
|
+ <3 RK_PA6 3 &pcfg_pull_up_2ma>,
|
|
+ <3 RK_PA7 3 &pcfg_pull_up_2ma>;
|
|
};
|
|
};
|
|
|
|
- pmic {
|
|
- pmic_int_l: pmic-int-l {
|
|
- rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ gmac-1 {
|
|
+ rgmiim1_pins: rgmiim1-pins {
|
|
+ rockchip,pins =
|
|
+ /* mac_txclk */
|
|
+ <1 RK_PB4 2 &pcfg_pull_none_4ma>,
|
|
+ /* mac_rxclk */
|
|
+ <1 RK_PB5 2 &pcfg_pull_none>,
|
|
+ /* mac_mdio */
|
|
+ <1 RK_PC3 2 &pcfg_pull_none_2ma>,
|
|
+ /* mac_txen */
|
|
+ <1 RK_PD1 2 &pcfg_pull_none_4ma>,
|
|
+ /* mac_clk */
|
|
+ <1 RK_PC5 2 &pcfg_pull_none_2ma>,
|
|
+ /* mac_rxdv */
|
|
+ <1 RK_PC6 2 &pcfg_pull_none>,
|
|
+ /* mac_mdc */
|
|
+ <1 RK_PC7 2 &pcfg_pull_none_2ma>,
|
|
+ /* mac_rxd1 */
|
|
+ <1 RK_PB2 2 &pcfg_pull_none>,
|
|
+ /* mac_rxd0 */
|
|
+ <1 RK_PB3 2 &pcfg_pull_none>,
|
|
+ /* mac_txd1 */
|
|
+ <1 RK_PB0 2 &pcfg_pull_none_4ma>,
|
|
+ /* mac_txd0 */
|
|
+ <1 RK_PB1 2 &pcfg_pull_none_4ma>,
|
|
+ /* mac_rxd3 */
|
|
+ <1 RK_PB6 2 &pcfg_pull_none>,
|
|
+ /* mac_rxd2 */
|
|
+ <1 RK_PB7 2 &pcfg_pull_none>,
|
|
+ /* mac_txd3 */
|
|
+ <1 RK_PC0 2 &pcfg_pull_none_4ma>,
|
|
+ /* mac_txd2 */
|
|
+ <1 RK_PC1 2 &pcfg_pull_none_4ma>,
|
|
+
|
|
+ /* mac_txclk */
|
|
+ <0 RK_PB0 1 &pcfg_pull_none>,
|
|
+ /* mac_txen */
|
|
+ <0 RK_PB4 1 &pcfg_pull_none>,
|
|
+ /* mac_clk */
|
|
+ <0 RK_PD0 1 &pcfg_pull_none>,
|
|
+ /* mac_txd1 */
|
|
+ <0 RK_PC0 1 &pcfg_pull_none>,
|
|
+ /* mac_txd0 */
|
|
+ <0 RK_PC1 1 &pcfg_pull_none>,
|
|
+ /* mac_txd3 */
|
|
+ <0 RK_PC7 1 &pcfg_pull_none>,
|
|
+ /* mac_txd2 */
|
|
+ <0 RK_PC6 1 &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
- sd {
|
|
- sdio_vcc_pin: sdio-vcc-pin {
|
|
- rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ usb {
|
|
+ host_vbus_drv: host-vbus-drv {
|
|
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ otg_vbus_drv: otg-vbus-drv {
|
|
+ rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
+
|
|
+ gpio-leds {
|
|
+ leds_gpio: leds-gpio {
|
|
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
};
|
|
|
|
-&pwm2 {
|
|
+&sdmmc {
|
|
+ bus-width = <4>;
|
|
+ cap-mmc-highspeed;
|
|
+ cap-sd-highspeed;
|
|
+ disable-wp;
|
|
+ max-frequency = <150000000>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
|
|
+ vmmc-supply = <&vcc_sd>;
|
|
status = "okay";
|
|
};
|
|
|
|
-&sdmmc {
|
|
+&sdmmc_ext {
|
|
bus-width = <4>;
|
|
cap-sd-highspeed;
|
|
+ cap-sdio-irq;
|
|
disable-wp;
|
|
- pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
|
|
+ keep-power-in-suspend;
|
|
+ max-frequency = <100000000>;
|
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
|
+ non-removable;
|
|
+ num-slots = <1>;
|
|
pinctrl-names = "default";
|
|
- sd-uhs-sdr12;
|
|
- sd-uhs-sdr25;
|
|
- sd-uhs-sdr50;
|
|
+ pinctrl-0 = <&sdmmc0ext_clk &sdmmc0ext_cmd &sdmmc0ext_bus4>;
|
|
+ rockchip,default-sample-phase = <120>;
|
|
+ supports-sdio;
|
|
sd-uhs-sdr104;
|
|
- vmmc-supply = <&vcc_sd>;
|
|
- vqmmc-supply = <&vcc_io_sdio>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
status = "okay";
|
|
+
|
|
+ brcmf: bcrmf@1 {
|
|
+ reg = <1>;
|
|
+ compatible = "brcm,bcm4329-fmac";
|
|
+ interrupt-parent = <&gpio1>;
|
|
+ interrupts = <RK_PD2 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "host-wake";
|
|
+ };
|
|
};
|
|
|
|
&tsadc {
|
|
- rockchip,hw-tshut-mode = <0>;
|
|
- rockchip,hw-tshut-polarity = <0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
status = "okay";
|
|
};
|
|
|
|
@@ -378,13 +539,16 @@ &u2phy_otg {
|
|
status = "okay";
|
|
};
|
|
|
|
-&uart2 {
|
|
+&usb20_otg {
|
|
status = "okay";
|
|
};
|
|
|
|
-&usb20_otg {
|
|
+&usb_host0_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_ohci {
|
|
status = "okay";
|
|
- dr_mode = "host";
|
|
};
|
|
|
|
&usbdrd3 {
|
|
@@ -393,17 +557,10 @@ &usbdrd3 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
- /* Second port is for USB 3.0 */
|
|
- rtl8153: device@2 {
|
|
+ r8153: device@2 {
|
|
compatible = "usbbda,8153";
|
|
reg = <2>;
|
|
+ realtek,led-data = <0x87>;
|
|
+ local-mac-address = [00 00 00 00 00 00];
|
|
};
|
|
};
|
|
-
|
|
-&usb_host0_ehci {
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&usb_host0_ohci {
|
|
- status = "okay";
|
|
-};
|
|
|
|
--
|
|
2.34.1
|
|
|