1323 lines
28 KiB
Diff
1323 lines
28 KiB
Diff
From 4af18a7595fc0bf36b91867217ac1bfbb7e5503f Mon Sep 17 00:00:00 2001
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From: Paolo Sabatino <paolo.sabatino@gmail.com>
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Date: Sun, 21 May 2023 17:35:55 +0200
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Subject: [PATCH] rk3399: add Orange Pi 4 LTS device tree
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---
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.../dts/rockchip/rk3399-orangepi-4-lts.dts | 1244 +++++++++++++++++
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1 file changed, 1244 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
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new file mode 100644
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index 000000000000..6d6bee12a453
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
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@@ -0,0 +1,1304 @@
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+/*
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+ * SPDX-License-Identifier: (GPL-2.0+ or MIT)
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+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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+ * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
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+ * Copyright (c) 2020-2022 Armbian (chwe17, piter75, jock)
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+ *
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+ */
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+
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+/dts-v1/;
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+#include <dt-bindings/input/linux-event-codes.h>
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+#include <dt-bindings/pwm/pwm.h>
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+#include <dt-bindings/usb/pd.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/usb/pd.h>
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+#include "rk3399.dtsi"
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+#include "rk3399-opp.dtsi"
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+
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+/ {
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+ model = "OrangePi 4 LTS";
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+ compatible = "xunlong,orangepi-4-lts", "rockchip,rk3399";
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ aliases {
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+ spi1 = &spi1;
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+ };
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+
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+ clkin_gmac: external-gmac-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "clkin_gmac";
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+ #clock-cells = <0>;
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+ };
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+
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+ vcc_sys: vcc-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc_sys>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ usb_vbus: usb-vbus {
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+ compatible = "regulator-fixed";
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+ regulator-name = "usb_vbus";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ usb3_vbus: usb3-vbus {
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+ compatible = "regulator-fixed";
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+ regulator-name = "usb3_vbus";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vbus_typec: vbus-typec {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_typec_en>;
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+ regulator-name = "vbus-5v";
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+ regulator-always-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ /* 0.9 V supply, over PMIC
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+ vcc_0v9: vcc-0v9 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_0v9";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ }
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+ */
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+
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+ vcc3v0_sd: vcc3v0-sd {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc_pwr>;
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+ regulator-name = "vcc3v0_sd";
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+ regulator-always-on;
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+ regulator-min-microvolt = <3000000>;
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+ regulator-max-microvolt = <3000000>;
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+ vin-supply = <&vcc3v3_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc3v3_pcie: vcc3v3-pcie-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_drv>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-name = "vcc3v3_pcie";
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+ };
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+
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+ vcc3v3_sys: vcc3v3-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_sys>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vdd_log: vdd-log {
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+ compatible = "pwm-regulator";
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+ pwms = <&pwm2 0 25000 1>;
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+ regulator-name = "vdd_log";
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <1400000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ es8316c_card: es8316c-card {
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+ compatible = "simple-audio-card";
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+
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,name = "rockchip-es8316c";
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+ simple-audio-card,mclk-fs = <256>;
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+ simple-audio-card,hp-det-gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&hp_det>;
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+
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+ simple-audio-card,widgets =
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+ "Microphone", "Mic Jack",
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+ "Headphone", "Headphones";
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+
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+ simple-audio-card,routing =
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+ "MIC1", "Mic Jack",
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+ "Headphones", "HPOL",
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+ "Headphones", "HPOR";
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+
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s0>;
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+ };
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&es8316c_codec>;
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+ };
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+
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+ };
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+
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+ hdmi-sound {
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,mclk-fs = <256>;
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+ simple-audio-card,name = "hdmi-sound";
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+ status = "okay";
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+
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s2>;
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+ };
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&hdmi>;
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+ };
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+ };
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+
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+ spdif-sound {
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+ status = "disable";
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+ compatible = "simple-audio-card";
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+ simple-audio-card,name = "ROCKCHIP,SPDIF";
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+ simple-audio-card,cpu {
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+ sound-dai = <&spdif>;
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+ };
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+ simple-audio-card,codec {
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+ sound-dai = <&spdif_out>;
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+ };
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+ };
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+
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+ spdif_out: spdif-out {
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+ status = "disable";
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+ compatible = "linux,spdif-dit";
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+ #sound-dai-cells = <0>;
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+ };
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+
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+ pwm_bl: backlight {
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+ status = "disable";
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+ compatible = "pwm-backlight";
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+ pwms = <&pwm0 0 25000 0>;
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+ brightness-levels = <
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+ 0 1 2 3 4 5 6 7
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+ 8 9 10 11 12 13 14 15
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+ 16 17 18 19 20 21 22 23
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+ 24 25 26 27 28 29 30 31
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+ 32 33 34 35 36 37 38 39
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+ 40 41 42 43 44 45 46 47
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+ 48 49 50 51 52 53 54 55
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+ 56 57 58 59 60 61 62 63
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+ 64 65 66 67 68 69 70 71
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+ 72 73 74 75 76 77 78 79
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+ 80 81 82 83 84 85 86 87
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+ 88 89 90 91 92 93 94 95
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+ 96 97 98 99 100 101 102 103
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+ 104 105 106 107 108 109 110 111
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+ 112 113 114 115 116 117 118 119
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+ 120 121 122 123 124 125 126 127
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+ 128 129 130 131 132 133 134 135
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+ 136 137 138 139 140 141 142 143
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+ 144 145 146 147 148 149 150 151
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+ 152 153 154 155 156 157 158 159
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+ 160 161 162 163 164 165 166 167
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+ 168 169 170 171 172 173 174 175
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+ 176 177 178 179 180 181 182 183
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+ 184 185 186 187 188 189 190 191
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+ 192 193 194 195 196 197 198 199
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+ 200 201 202 203 204 205 206 207
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+ 208 209 210 211 212 213 214 215
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+ 216 217 218 219 220 221 222 223
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+ 224 225 226 227 228 229 230 231
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+ 232 233 234 235 236 237 238 239
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+ 240 241 242 243 244 245 246 247
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+ 248 249 250 251 252 253 254 255>;
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+ default-brightness-level = <200>;
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+ };
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+
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+ gpio-keys {
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+ compatible = "gpio-keys";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ autorepeat;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&power_key>;
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+
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+ button@0 {
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+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
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+ linux,code = <KEY_POWER>;
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+ label = "GPIO Key Power";
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+ linux,input-type = <1>;
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+ gpio-key,wakeup = <1>;
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+ debounce-interval = <100>;
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+ };
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+ };
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+
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+ adc-keys {
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+ compatible = "adc-keys";
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+ io-channels = <&saradc 1>;
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+ io-channel-names = "buttons";
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+ poll-interval = <100>;
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+ keyup-threshold-microvolt = <1800000>;
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+
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+ button-up {
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+ label = "Volume Up";
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+ linux,code = <KEY_VOLUMEUP>;
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+ press-threshold-microvolt = <100000>;
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+ };
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+
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+ button-down {
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+ label = "Volume Down";
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+ linux,code = <KEY_VOLUMEDOWN>;
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+ press-threshold-microvolt = <300000>;
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+ };
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+ };
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+
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+ leds: gpio-leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 =<&leds_gpio>;
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+
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+ led@1 {
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+ gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
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+ label = "status_led";
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+ linux,default-trigger = "heartbeat";
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+ linux,default-trigger-delay-ms = <0>;
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+ };
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+ };
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+
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ clocks = <&rk808 1>;
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+ clock-names = "ext_clock";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&wifi_enable_h>;
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+
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+ /*
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+ * On the module itself this is one of these (depending
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+ * on the actual card populated):
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+ * - SDIO_RESET_L_WL_REG_ON
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+ * - PDN (power down when low)
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+ */
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+ reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
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+ };
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+
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+ unisoc_uwe_bsp: uwe-bsp {
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+ compatible = "unisoc,uwe_bsp";
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+ //wl-reg-on = <&gpio0 10 GPIO_ACTIVE_HIGH>; // handled by sdio-pwrseq
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+ bt-reg-on = <&gpio0 9 GPIO_ACTIVE_HIGH>;
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+ wl-wake-host-gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>;
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+ bt-wake-host-gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
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+ sdio-ext-int-gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
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+ unisoc,btwf-file-name = "/lib/firmware/uwe5622/wcnmodem-38222.bin";
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+ data-irq;
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+ blksz-512;
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+ keep-power-on;
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+ status = "okay";
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+ };
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+
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+ sprd-wlan {
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+ compatible = "sprd,uwe5622-wifi";
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+ status = "okay";
|
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+ };
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+
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+ sprd-mtty {
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+ compatible = "sprd,mtty";
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+ sprd,name = "ttyBT";
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+ status = "okay";
|
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+ };
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+
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+ dmc_opp_table: dmc_opp_table {
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+ compatible = "operating-points-v2";
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+
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+ opp00 {
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+ opp-hz = /bits/ 64 <328000000>;
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+ opp-microvolt = <900000>;
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+ };
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+
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+ opp01 {
|
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+ opp-hz = /bits/ 64 <416000000>;
|
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+ opp-microvolt = <900000>;
|
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+ };
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+
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+ opp02 {
|
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+ opp-hz = /bits/ 64 <666000000>;
|
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+ opp-microvolt = <900000>;
|
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+ };
|
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+
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+ };
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+
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+};
|
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+
|
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+&cpu_l0 {
|
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+ cpu-supply = <&vdd_cpu_l>;
|
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+};
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+
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+&cpu_l1 {
|
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+ cpu-supply = <&vdd_cpu_l>;
|
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+};
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+
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+&cpu_l2 {
|
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+ cpu-supply = <&vdd_cpu_l>;
|
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+};
|
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+
|
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+&cpu_l3 {
|
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+ cpu-supply = <&vdd_cpu_l>;
|
|
+};
|
|
+
|
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+&cpu_b0 {
|
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+ cpu-supply = <&vdd_cpu_b>;
|
|
+};
|
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+
|
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+&cpu_b1 {
|
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+ cpu-supply = <&vdd_cpu_b>;
|
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+};
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+
|
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+&gpu {
|
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+ status = "okay";
|
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+ mali-supply = <&vdd_gpu>;
|
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+};
|
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+
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+&gmac {
|
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+ assigned-clocks = <&cru SCLK_RMII_SRC>;
|
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+ assigned-clock-parents = <&clkin_gmac>;
|
|
+ clock_in_out = "input";
|
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+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rgmii_pins>;
|
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+ phy-mode = "rgmii";
|
|
+ phy-supply = <&vcc3v3_s3>;
|
|
+ snps,reset-active-low;
|
|
+ snps,reset-delays-us = <0 10000 50000>;
|
|
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
|
+ tx_delay = <0x28>;
|
|
+ rx_delay = <0x11>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
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+&spi1 {
|
|
+ status = "disable";
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-1 = <&spi1_gpio>;
|
|
+
|
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+ spidev0: spidev@0 {
|
|
+ compatible = "rockchip,spidev";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <10000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
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+&uart0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopb {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopb_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopl {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
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+&vopl_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vpu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
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+&rga {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&cdn_dp {
|
|
+ status = "okay";
|
|
+ extcon = <&fusb0>;
|
|
+ phys = <&tcphy0_dp>;
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ /* remove the hdmi_i2c_xfer */
|
|
+ pinctrl-0 = <&hdmi_cec>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+ ddc-i2c-bus = <&i2c7>;
|
|
+};
|
|
+
|
|
+&i2c0 {
|
|
+ clock-frequency = <400000>;
|
|
+ i2c-scl-rising-time-ns = <160>;
|
|
+ i2c-scl-falling-time-ns = <30>;
|
|
+ status = "okay";
|
|
+
|
|
+ rk808: pmic@1b {
|
|
+ compatible = "rockchip,rk808";
|
|
+ reg = <0x1b>;
|
|
+ interrupt-parent = <&gpio2>;
|
|
+ interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
|
|
+ #clock-cells = <1>;
|
|
+ clock-output-names = "xin32k", "rk808-clkout2";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pmic_int_l>;
|
|
+ rockchip,system-power-controller;
|
|
+ wakeup-source;
|
|
+
|
|
+ vcc1-supply = <&vcc3v3_sys>;
|
|
+ vcc2-supply = <&vcc3v3_sys>;
|
|
+ vcc3-supply = <&vcc3v3_sys>;
|
|
+ vcc4-supply = <&vcc3v3_sys>;
|
|
+ vcc6-supply = <&vcc3v3_sys>;
|
|
+ vcc7-supply = <&vcc3v3_sys>;
|
|
+ vcc8-supply = <&vcc3v3_sys>;
|
|
+ vcc9-supply = <&vcc3v3_sys>;
|
|
+ vcc10-supply = <&vcc3v3_sys>;
|
|
+ vcc11-supply = <&vcc3v3_sys>;
|
|
+ vcc12-supply = <&vcc3v3_sys>;
|
|
+ vcc13-supply = <&vcc3v3_sys>;
|
|
+ vcc14-supply = <&vcc3v3_sys>;
|
|
+ vddio-supply = <&vcc_3v0>;
|
|
+
|
|
+ regulators {
|
|
+ vdd_center: DCDC_REG1 {
|
|
+ regulator-name = "vdd_center";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <6001>;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_cpu_l: DCDC_REG2 {
|
|
+ regulator-name = "vdd_cpu_l";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <6001>;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_ddr: DCDC_REG3 {
|
|
+ regulator-name = "vcc_ddr";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc1v8: vcc1v8_s3: vcca1v8_s3: DCDC_REG4 {
|
|
+ regulator-name = "vcc1v8";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc1v8_dvp: LDO_REG1 {
|
|
+ regulator-name = "vcc1v8_dvp";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v0_touch: LDO_REG2 {
|
|
+ regulator-name = "vcc3v0_touch";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3000000>;
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc1v8_pmu: LDO_REG3 {
|
|
+ regulator-name = "vcc1v8_pmu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_sdio: LDO_REG4 {
|
|
+ regulator-name = "vcc_sdio";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ regulator-init-microvolt = <3000000>;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca3v0_codec: LDO_REG5 {
|
|
+ regulator-name = "vcca3v0_codec";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3000000>;
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v5: LDO_REG6 {
|
|
+ regulator-name = "vcc_1v5";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1500000>;
|
|
+ regulator-max-microvolt = <1500000>;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1500000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_codec: LDO_REG7 {
|
|
+ regulator-name = "vcca1v8_codec";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_3v0: LDO_REG8 {
|
|
+ regulator-name = "vcc_3v0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3000000>;
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_s3: vcc_lan: SWITCH_REG1 {
|
|
+ regulator-name = "vcc3v3_s3";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_s0: SWITCH_REG2 {
|
|
+ regulator-name = "vcc3v3_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_cpu_b: regulator@40 {
|
|
+ compatible = "silergy,syr827";
|
|
+ reg = <0x40>;
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&vsel1_gpio>;
|
|
+ vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
|
|
+ regulator-compatible = "fan53555-reg";
|
|
+ regulator-name = "vdd_cpu_b";
|
|
+ regulator-min-microvolt = <712500>;
|
|
+ regulator-max-microvolt = <1500000>;
|
|
+ regulator-ramp-delay = <1000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ vin-supply = <&vcc3v3_sys>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_gpu: regulator@41 {
|
|
+ compatible = "silergy,syr828";
|
|
+ reg = <0x41>;
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&vsel2_gpio>;
|
|
+ vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
|
|
+ regulator-compatible = "fan53555-reg";
|
|
+ regulator-name = "vdd_gpu";
|
|
+ regulator-min-microvolt = <712500>;
|
|
+ regulator-max-microvolt = <1500000>;
|
|
+ regulator-ramp-delay = <1000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ vin-supply = <&vcc3v3_sys>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ clock-frequency = <200000>;
|
|
+ i2c-scl-rising-time-ns = <300>;
|
|
+ i2c-scl-falling-time-ns = <15>;
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ es8316c_codec: es8316c@11 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "everest,es8316";
|
|
+ reg = <17>;
|
|
+ clocks = <&cru SCLK_I2S_8CH_OUT>;
|
|
+ clock-names = "mclk";
|
|
+ //pinctrl-names = "default";
|
|
+ //pinctrl-0 = <&i2s_8ch_mclk>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+};
|
|
+
|
|
+&i2c3 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c4 {
|
|
+ status = "okay";
|
|
+ i2c-scl-rising-time-ns = <160>;
|
|
+ i2c-scl-falling-time-ns = <30>;
|
|
+ clock-frequency = <400000>;
|
|
+
|
|
+ fusb0: fusb30x@22 {
|
|
+ compatible = "fcs,fusb302";
|
|
+ reg = <0x22>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&fusb0_int>;
|
|
+ interrupt-parent = <&gpio1>;
|
|
+ interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
|
|
+ vbus-supply = <&vbus_typec>;
|
|
+ status = "okay";
|
|
+
|
|
+ connector {
|
|
+ compatible = "usb-c-connector";
|
|
+ data-role = "dual";
|
|
+ label = "USB-C";
|
|
+ op-sink-microwatt = <1000000>;
|
|
+ power-role = "dual";
|
|
+ sink-pdos =
|
|
+ <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>;
|
|
+ source-pdos =
|
|
+ <PDO_FIXED(5000, 1400, PDO_FIXED_USB_COMM)>;
|
|
+ try-power-role = "sink";
|
|
+
|
|
+ extcon-cables = <1 2 5 6 9 10 12 44>;
|
|
+ typec-altmodes = <0xff01 1 0x001c0000 1>;
|
|
+
|
|
+ ports {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ port@0 {
|
|
+ reg = <0>;
|
|
+
|
|
+ usbc_hs: endpoint {
|
|
+ remote-endpoint =
|
|
+ <&u2phy0_typec_hs>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ port@1 {
|
|
+ reg = <1>;
|
|
+
|
|
+ usbc_ss: endpoint {
|
|
+ remote-endpoint =
|
|
+ <&tcphy0_typec_ss>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ port@2 {
|
|
+ reg = <2>;
|
|
+
|
|
+ usbc_dp: endpoint {
|
|
+ remote-endpoint =
|
|
+ <&tcphy0_typec_dp>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ ft5x06_ts@38 {
|
|
+ compatible = "edt,edt-ft5x06", "ft5x06";
|
|
+ reg = <0x38>;
|
|
+ interrupt-parent = <&gpio1>;
|
|
+ interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+};
|
|
+
|
|
+&i2c7 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&spdif {
|
|
+ status = "disable";
|
|
+ pinctrl-0 = <&spdif_bus>;
|
|
+ i2c-scl-rising-time-ns = <450>;
|
|
+ i2c-scl-falling-time-ns = <15>;
|
|
+ #sound-dai-cells = <0>;
|
|
+};
|
|
+
|
|
+&i2s0 {
|
|
+ rockchip,i2s-broken-burst-len;
|
|
+ assigned-clocks = <&cru SCLK_I2SOUT_SRC>;
|
|
+ assigned-clock-parents = <&cru SCLK_I2S0_8CH>;
|
|
+ resets = <&cru SRST_I2S0_8CH>, <&cru SRST_H_I2S0_8CH>;
|
|
+ reset-names = "reset-m", "reset-h";
|
|
+ rockchip,playback-channels = <2>;
|
|
+ rockchip,capture-channels = <2>;
|
|
+ status = "okay";
|
|
+ #sound-dai-cells = <0>;
|
|
+};
|
|
+
|
|
+&i2s2 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&io_domains {
|
|
+ status = "okay";
|
|
+
|
|
+ bt656-supply = <&vcc1v8_dvp>; /* bt656_gpio2ab_ms */
|
|
+ audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */
|
|
+ sdmmc-supply = <&vcc_sdio>; /* sdmmc_gpio4b_ms */
|
|
+ gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
|
|
+};
|
|
+
|
|
+&pmu_io_domains {
|
|
+ status = "okay";
|
|
+ pmu1830-supply = <&vcc_3v0>;
|
|
+};
|
|
+
|
|
+&pcie_phy {
|
|
+ status = "okay";
|
|
+ assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
|
|
+ assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
|
|
+ assigned-clock-rates = <100000000>;
|
|
+};
|
|
+
|
|
+&pcie0 {
|
|
+ status = "okay";
|
|
+ ep-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
|
|
+ num-lanes = <4>;
|
|
+ max-link-speed = <1>;
|
|
+};
|
|
+
|
|
+&pwm_bl {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwm0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwm1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwm2 {
|
|
+ status = "okay";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pwm2_pin_pull_down>;
|
|
+};
|
|
+
|
|
+&saradc {
|
|
+ status = "okay";
|
|
+ vref-supply = <&vcca1v8_s3>; /* TBD */
|
|
+};
|
|
+
|
|
+&sdhci {
|
|
+ bus-width = <8>;
|
|
+ mmc-hs400-1_8v;
|
|
+ supports-emmc;
|
|
+ non-removable;
|
|
+ keep-power-in-suspend;
|
|
+ mmc-hs400-enhanced-strobe;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&emmc_phy {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdio0 {
|
|
+ clock-frequency = <150000000>;
|
|
+ max-frequency = <150000000>;
|
|
+ supports-sdio;
|
|
+ bus-width = <4>;
|
|
+ disable-wp;
|
|
+ cap-sd-highspeed;
|
|
+ cap-sdio-irq;
|
|
+ keep-power-in-suspend;
|
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
|
+ non-removable;
|
|
+ num-slots = <1>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
|
|
+ sd-uhs-sdr104;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc {
|
|
+ bus-width = <4>;
|
|
+ cap-sd-highspeed;
|
|
+ cap-mmc-highspeed;
|
|
+ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
|
|
+ cd-debounce-delay-ms = <500>;
|
|
+ disable-wp;
|
|
+ max-frequency = <150000000>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
|
|
+ sd-uhs-sdr104;
|
|
+ vmmc-supply = <&vcc3v0_sd>;
|
|
+ vqmmc-supply = <&vcc_sdio>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ /* tshut mode 0:CRU 1:GPIO */
|
|
+ rockchip,hw-tshut-mode = <1>;
|
|
+ /* tshut polarity 0:LOW 1:HIGH */
|
|
+ rockchip,hw-tshut-polarity = <1>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tcphy0 {
|
|
+ extcon = <&fusb0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tcphy0_dp {
|
|
+ port {
|
|
+ tcphy0_typec_dp: endpoint {
|
|
+ remote-endpoint = <&usbc_dp>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&tcphy0_usb3 {
|
|
+ port {
|
|
+ tcphy0_typec_ss: endpoint {
|
|
+ remote-endpoint = <&usbc_ss>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&tcphy1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy0 {
|
|
+ status = "okay";
|
|
+
|
|
+ u2phy0_otg: otg-port {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ u2phy0_host: host-port {
|
|
+ phy-supply = <&usb3_vbus>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ port {
|
|
+ u2phy0_typec_hs: endpoint {
|
|
+ remote-endpoint = <&usbc_hs>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
+
|
|
+&u2phy1 {
|
|
+ status = "okay";
|
|
+
|
|
+ u2phy1_otg: otg-port {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ u2phy1_host: host-port {
|
|
+ phy-supply = <&usb_vbus>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+&usbdrd3_0 {
|
|
+ status = "okay";
|
|
+ extcon = <&fusb0>;
|
|
+};
|
|
+
|
|
+&usbdrd3_1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd_dwc3_0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd_dwc3_1 {
|
|
+ status = "okay";
|
|
+ dr_mode = "host";
|
|
+};
|
|
+
|
|
+&usb_host0_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc_bus4 {
|
|
+ rockchip,pins =
|
|
+ <4 RK_PB0 1 &pcfg_pull_up_12ma>,
|
|
+ <4 RK_PB1 1 &pcfg_pull_up_12ma>,
|
|
+ <4 RK_PB2 1 &pcfg_pull_up_12ma>,
|
|
+ <4 RK_PB3 1 &pcfg_pull_up_12ma>;
|
|
+};
|
|
+
|
|
+&sdmmc_cmd {
|
|
+ rockchip,pins =
|
|
+ <4 RK_PB5 1 &pcfg_pull_up_12ma>;
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+
|
|
+ pcfg_pull_up_12ma: pcfg-pull-up-12ma {
|
|
+ bias-pull-up;
|
|
+ drive-strength = <12>;
|
|
+ };
|
|
+
|
|
+ pcie {
|
|
+ pcie_drv: pcie-drv {
|
|
+ rockchip,pins =
|
|
+ <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ hdmi {
|
|
+ /delete-node/ hdmi-i2c-xfer;
|
|
+ };
|
|
+
|
|
+ i2s0 {
|
|
+ i2s_8ch_mclk: i2s-8ch-mclk {
|
|
+ rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pmic {
|
|
+ pmic_int_l: pmic-int-l {
|
|
+ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ vsel1_gpio: vsel1-gpio {
|
|
+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
+ };
|
|
+
|
|
+ vsel2_gpio: vsel2-gpio {
|
|
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb-typec {
|
|
+ vcc5v0_typec_en: vcc5v0_typec_en {
|
|
+ rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fusb30x {
|
|
+ fusb0_int: fusb0-int {
|
|
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdio-pwrseq {
|
|
+ wifi_enable_h: wifi-enable-h {
|
|
+ rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ wireless-bluetooth {
|
|
+ uart0_gpios: uart0-gpios {
|
|
+ rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rockchip-key {
|
|
+ power_key: power-key {
|
|
+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ headphone {
|
|
+ hp_det: hp-det {
|
|
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-leds {
|
|
+ leds_gpio: leds-gpio {
|
|
+ rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ cam_pins {
|
|
+ cif_clkout_a: cif-clkout-a {
|
|
+ rockchip,pins = <2 11 3 &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ cif_clkout_a_sleep: cif-clkout-a-sleep {
|
|
+ rockchip,pins = <2 11 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ cam0_default_pins: cam0-default-pins {
|
|
+ rockchip,pins =
|
|
+ <4 27 0 &pcfg_pull_down>,
|
|
+ <2 11 3 &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ cam0_sleep_pins: cam0-sleep-pins {
|
|
+ rockchip,pins =
|
|
+ <4 27 3 &pcfg_pull_none>,
|
|
+ <2 11 0 &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ cam1_default_pins: cam1-default-pins {
|
|
+ rockchip,pins =
|
|
+ <0 12 RK_FUNC_GPIO &pcfg_pull_down>,
|
|
+ <0 8 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spi1 {
|
|
+ spi1_gpio: spi1-gpio {
|
|
+ rockchip,pins =
|
|
+ <1 7 RK_FUNC_GPIO &pcfg_output_low>,
|
|
+ <1 8 RK_FUNC_GPIO &pcfg_output_low>,
|
|
+ <1 9 RK_FUNC_GPIO &pcfg_output_low>,
|
|
+ <1 10 RK_FUNC_GPIO &pcfg_output_low>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ bt {
|
|
+ bt_host_wake: bt-host-wake {
|
|
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ bt_reset: bt-reset {
|
|
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ bt_wake: bt-wake {
|
|
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
+
|
|
+&hdmi_in_vopb {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hdmi_in_vopl {
|
|
+ status = "disable";
|
|
+};
|
|
+
|
|
+&dp_in_vopb {
|
|
+ status = "disable";
|
|
+};
|
|
+&dp_in_vopl {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&dmc {
|
|
+ #cooling-cells = <2>; /* min followed by max */
|
|
+
|
|
+ status = "okay";
|
|
+ center-supply = <&vdd_log>;
|
|
+ operating-points-v2 = <&dmc_opp_table>;
|
|
+
|
|
+ rockchip,pd-idle-ns = <160>;
|
|
+ rockchip,sr-idle-ns = <10240>;
|
|
+ rockchip,sr-mc-gate-idle-ns = <40960>;
|
|
+ rockchip,srpd-lite-idle-ns = <61440>;
|
|
+ rockchip,standby-idle-ns = <81920>;
|
|
+
|
|
+ rockchip,ddr3_odt_dis_freq = <666000000>;
|
|
+ rockchip,lpddr3_odt_dis_freq = <666000000>;
|
|
+ rockchip,lpddr4_odt_dis_freq = <666000000>;
|
|
+
|
|
+ rockchip,sr-mc-gate-idle-dis-freq-hz = <1000000000>;
|
|
+ rockchip,srpd-lite-idle-dis-freq-hz = <0>;
|
|
+ rockchip,standby-idle-dis-freq-hz = <928000000>;
|
|
+
|
|
+};
|
|
+
|
|
+&dfi {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+/*
|
|
+ * Redefine some parameters for the thermal trip points for Opi4 LTS.
|
|
+ * First of all, the Soc does not like getting over 90°C. My sample
|
|
+ * froze at 94.4°C, so we lower the critical temprature to 90°C, hopefully
|
|
+ * giving enough room for safe reboot of the device.
|
|
+ * Big cores are getting throttled a bit when reaching 82°C, then at 85°C
|
|
+ * we aggressively throttle all the cores and even the memory controller.
|
|
+ * The GPU is handled by existing trip points in the base device tree, here
|
|
+ * we just set the same critical temperature as CPU.
|
|
+ */
|
|
+&cpu_alert0 {
|
|
+ temperature = <82000>;
|
|
+};
|
|
+
|
|
+&cpu_alert1 {
|
|
+ temperature = <85000>;
|
|
+};
|
|
+
|
|
+&cpu_crit {
|
|
+ temperatue = <90000>;
|
|
+};
|
|
+
|
|
+&gpu_crit {
|
|
+ temperatue = <90000>;
|
|
+};
|
|
+
|
|
+&cpu_thermal {
|
|
+
|
|
+ cooling-maps {
|
|
+
|
|
+ map0 {
|
|
+ trip = <&cpu_alert0>;
|
|
+ cooling-device =
|
|
+ <&cpu_b0 THERMAL_NO_LIMIT 3>,
|
|
+ <&cpu_b1 THERMAL_NO_LIMIT 3>;
|
|
+ };
|
|
+
|
|
+ map1 {
|
|
+ trip = <&cpu_alert1>;
|
|
+ cooling-device =
|
|
+ <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
+ <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
+ <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
+ <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
+ <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
+ <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
+ };
|
|
+
|
|
+ map2 {
|
|
+ trip = <&cpu_alert1>;
|
|
+ cooling-device =
|
|
+ <&dmc THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+};
|
|
--
|
|
2.34.1
|