293 lines
7.0 KiB
Diff
293 lines
7.0 KiB
Diff
From 4834c59f7a14e9736dcc432c7bec7507d1547a8d Mon Sep 17 00:00:00 2001
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From: Andre Przywara <andre.przywara@arm.com>
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Date: Fri, 27 Nov 2020 15:28:40 +0000
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Subject: [PATCH 031/101] arm64:dts: Add sun50i-h616-orangepi-zero2 device
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The OrangePi Zero 2 is a development board with the new H616 SoC. It
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comes with the following features:
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- Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
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- 512MiB/1GiB DDR3 DRAM
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- AXP305 PMIC
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- Raspberry-Pi-1 compatible GPIO header
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- extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports
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- 1 USB 2.0 host port
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- 1 USB 2.0 type C port (power supply + OTG)
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- MicroSD slot
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- on-board 2MiB bootable SPI NOR flash
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- 1Gbps Ethernet port (via RTL8211F PHY)
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- micro-HDMI port
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- unsupported Allwinner WiFi/BT chip
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For more details see: https://linux-sunxi.org/Orange_Pi_Zero_2
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Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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---
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arch/arm64/boot/dts/allwinner/Makefile | 1 +
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.../allwinner/sun50i-h616-orangepi-zero2.dts | 245 ++++++++++++++++++
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2 files changed, 246 insertions(+)
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create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
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index a96d9d2d8..62f8d43cf 100644
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--- a/arch/arm64/boot/dts/allwinner/Makefile
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+++ b/arch/arm64/boot/dts/allwinner/Makefile
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@@ -37,3 +37,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64-model-b.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6.dtb
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+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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new file mode 100644
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index 000000000..a26201288
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--- /dev/null
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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@@ -0,0 +1,245 @@
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+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
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+/*
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+ * Copyright (C) 2020 Arm Ltd.
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+ */
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+
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+/dts-v1/;
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+
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+#include "sun50i-h616.dtsi"
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/interrupt-controller/arm-gic.h>
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+#include <dt-bindings/leds/common.h>
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+
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+/ {
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+ model = "OrangePi Zero2";
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+ compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
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+
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+ aliases {
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+ ethernet0 = &emac0;
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+ serial0 = &uart0;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ led-0 {
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+ function = LED_FUNCTION_POWER;
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+ color = <LED_COLOR_ID_RED>;
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+ gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
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+ default-state = "on";
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+ };
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+
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+ led-1 {
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+ function = LED_FUNCTION_STATUS;
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+ color = <LED_COLOR_ID_GREEN>;
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+ gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
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+ };
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+ };
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+
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+ reg_vcc5v: vcc5v {
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+ /* board wide 5V supply directly from the USB-C socket */
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc-5v";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-always-on;
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+ };
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+
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+ reg_usb1_vbus: usb1-vbus {
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+ compatible = "regulator-fixed";
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+ regulator-name = "usb1-vbus";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <®_vcc5v>;
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+ enable-active-high;
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+ gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
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+ status = "okay";
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+ };
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+};
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+
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+&ehci1 {
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+ status = "okay";
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+};
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+
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+/* USB 2 & 3 are on headers only. */
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+
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+&emac0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&ext_rgmii_pins>;
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+ phy-mode = "rgmii";
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+ phy-handle = <&ext_rgmii_phy>;
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+ phy-supply = <®_dcdce>;
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+ allwinner,rx-delay-ps = <3100>;
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+ allwinner,tx-delay-ps = <700>;
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+ status = "okay";
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+};
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+
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+&mdio0 {
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+ ext_rgmii_phy: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <1>;
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+ };
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+};
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+
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+&mmc0 {
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+ vmmc-supply = <®_dcdce>;
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+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
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+ bus-width = <4>;
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+ status = "okay";
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+};
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+
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+&ohci1 {
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+ status = "okay";
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+};
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+
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+&r_rsb {
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+ status = "okay";
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+
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+ axp305: pmic@745 {
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+ compatible = "x-powers,axp305", "x-powers,axp805",
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+ "x-powers,axp806";
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ reg = <0x745>;
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+
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+ x-powers,self-working-mode;
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+ vina-supply = <®_vcc5v>;
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+ vinb-supply = <®_vcc5v>;
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+ vinc-supply = <®_vcc5v>;
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+ vind-supply = <®_vcc5v>;
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+ vine-supply = <®_vcc5v>;
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+ aldoin-supply = <®_vcc5v>;
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+ bldoin-supply = <®_vcc5v>;
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+ cldoin-supply = <®_vcc5v>;
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+
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+ regulators {
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+ reg_aldo1: aldo1 {
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+ regulator-always-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc-sys";
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+ };
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+
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+ reg_aldo2: aldo2 { /* 3.3V on headers */
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+ regulator-always-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc3v3-ext";
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+ };
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+
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+ reg_aldo3: aldo3 { /* 3.3V on headers */
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+ regulator-always-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc3v3-ext2";
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+ };
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+
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+ reg_bldo1: bldo1 {
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+ regulator-always-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-name = "vcc1v8";
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+ };
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+
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+ bldo2 {
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+ /* unused */
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+ };
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+
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+ bldo3 {
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+ /* unused */
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+ };
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+
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+ bldo4 {
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+ /* unused */
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+ };
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+
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+ cldo1 {
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+ /* reserved */
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+ };
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+
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+ cldo2 {
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+ /* unused */
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+ };
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+
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+ cldo3 {
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+ /* unused */
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+ };
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+
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+ reg_dcdca: dcdca {
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+ regulator-always-on;
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+ regulator-min-microvolt = <810000>;
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+ regulator-max-microvolt = <1080000>;
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+ regulator-name = "vdd-cpu";
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+ };
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+
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+ reg_dcdcc: dcdcc {
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+ regulator-always-on;
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+ regulator-min-microvolt = <810000>;
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+ regulator-max-microvolt = <1080000>;
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+ regulator-name = "vdd-gpu-sys";
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+ };
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+
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+ reg_dcdcd: dcdcd {
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+ regulator-always-on;
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+ regulator-min-microvolt = <1500000>;
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+ regulator-max-microvolt = <1500000>;
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+ regulator-name = "vdd-dram";
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+ };
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+
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+ reg_dcdce: dcdce {
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-name = "vcc-eth-mmc";
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+ };
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+
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+ sw {
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+ /* unused */
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+ };
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+ };
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+ };
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+};
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+
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+&spi0 {
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+ status = "okay";
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+
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+ flash@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <40000000>;
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+ };
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+};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_ph_pins>;
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+ status = "okay";
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+};
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+
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+&usbotg {
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+ /*
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+ * PHY0 pins are connected to a USB-C socket, but a role switch
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+ * is not implemented: both CC pins are pulled to GND.
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+ * The VBUS pins power the device, so a fixed peripheral mode
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+ * is the best choice.
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+ * The board can be powered via GPIOs, in this case port0 *can*
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+ * act as a host (with a cable/adapter ignoring CC), as VBUS is
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+ * then provided by the GPIOs. Any user of this setup would
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+ * need to adjust the DT accordingly: dr_mode set to "host",
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+ * enabling OHCI0 and EHCI0.
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+ */
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+ dr_mode = "peripheral";
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+ status = "okay";
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+};
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+
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+&usbphy {
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+ usb1_vbus-supply = <®_usb1_vbus>;
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+ status = "okay";
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+};
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--
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2.31.1
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