122 lines
3.8 KiB
Diff
122 lines
3.8 KiB
Diff
From 1a0687b60466469970a6b2dcd2b6dc5aef961310 Mon Sep 17 00:00:00 2001
|
|
From: Peter Geis <pgwipeout@gmail.com>
|
|
Date: Thu, 22 Jul 2021 20:54:28 -0400
|
|
Subject: [PATCH 095/478] arm64: dts: rockchip add rk356x usb3 nodes
|
|
|
|
Add the dwc3 usb3 controller nodes to the rk356x device tree.
|
|
|
|
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
|
|
---
|
|
arch/arm64/boot/dts/rockchip/rk3566.dtsi | 8 +++
|
|
arch/arm64/boot/dts/rockchip/rk3568.dtsi | 5 ++
|
|
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 64 ++++++++++++++++++++++++
|
|
3 files changed, 77 insertions(+)
|
|
|
|
diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
|
|
index 3839eef5e4f7..42b80b7b3933 100644
|
|
--- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
|
|
@@ -18,3 +18,11 @@ power-domain@RK3568_PD_PIPE {
|
|
#power-domain-cells = <0>;
|
|
};
|
|
};
|
|
+
|
|
+&usbdrd_dwc3 {
|
|
+ phys = <&u2phy0_otg>;
|
|
+ phy-names = "usb2-phy";
|
|
+ extcon = <&usb2phy0>;
|
|
+ maximum-speed = "high-speed";
|
|
+ snps,dis_u2_susphy_quirk;
|
|
+};
|
|
diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
|
|
index 591ebea8527b..132f86c50ffd 100644
|
|
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
|
|
@@ -126,3 +126,8 @@ power-domain@RK3568_PD_PIPE {
|
|
#power-domain-cells = <0>;
|
|
};
|
|
};
|
|
+
|
|
+&usbdrd_dwc3 {
|
|
+ phys = <&u2phy0_otg>, <&combphy0_us PHY_TYPE_USB3>;
|
|
+ phy-names = "usb2-phy", "usb3-phy";
|
|
+};
|
|
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
|
|
index 2d9f46d36d37..460a4fde4702 100644
|
|
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
|
|
@@ -222,6 +222,70 @@ sata2: sata@fc800000 {
|
|
status = "disabled";
|
|
};
|
|
|
|
+ usbdrd30: usbdrd {
|
|
+ compatible = "rockchip,rk3399-dwc3", "snps,dwc3";
|
|
+ clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>,
|
|
+ <&cru ACLK_USB3OTG0>, <&cru PCLK_PIPE>;
|
|
+ clock-names = "ref_clk", "suspend_clk",
|
|
+ "bus_clk", "pipe_clk";
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+ ranges;
|
|
+ status = "disabled";
|
|
+
|
|
+ usbdrd_dwc3: dwc3@fcc00000 {
|
|
+ compatible = "snps,dwc3";
|
|
+ reg = <0x0 0xfcc00000 0x0 0x400000>;
|
|
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ dr_mode = "host";
|
|
+ phys = <&u2phy0_otg>, <&combphy0_us PHY_TYPE_USB3>;
|
|
+ phy-names = "usb2-phy", "usb3-phy";
|
|
+ phy_type = "utmi_wide";
|
|
+ power-domains = <&power RK3568_PD_PIPE>;
|
|
+ resets = <&cru SRST_USB3OTG0>;
|
|
+ reset-names = "usb3-otg";
|
|
+ snps,dis_enblslpm_quirk;
|
|
+ snps,dis-u2-freeclk-exists-quirk;
|
|
+ snps,dis-del-phy-power-chg-quirk;
|
|
+ snps,dis-tx-ipgap-linecheck-quirk;
|
|
+ snps,xhci-trb-ent-quirk;
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usbhost30: usbhost {
|
|
+ compatible = "rockchip,rk3399-dwc3", "snps,dwc3";
|
|
+ clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>,
|
|
+ <&cru ACLK_USB3OTG1>, <&cru PCLK_PIPE>;
|
|
+ clock-names = "ref_clk", "suspend_clk",
|
|
+ "bus_clk", "pipe_clk";
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+ assigned-clocks = <&cru CLK_PCIEPHY1_REF>;
|
|
+ assigned-clock-rates = <25000000>;
|
|
+ ranges;
|
|
+ status = "disabled";
|
|
+
|
|
+ usbhost_dwc3: dwc3@fd000000 {
|
|
+ compatible = "snps,dwc3";
|
|
+ reg = <0x0 0xfd000000 0x0 0x400000>;
|
|
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ dr_mode = "host";
|
|
+ phys = <&u2phy0_host>, <&combphy1_usq PHY_TYPE_USB3>;
|
|
+ phy-names = "usb2-phy", "usb3-phy";
|
|
+ phy_type = "utmi_wide";
|
|
+ power-domains = <&power RK3568_PD_PIPE>;
|
|
+ resets = <&cru SRST_USB3OTG1>;
|
|
+ reset-names = "usb3-host";
|
|
+ snps,dis_enblslpm_quirk;
|
|
+ snps,dis-u2-freeclk-exists-quirk;
|
|
+ snps,dis_u2_susphy_quirk;
|
|
+ snps,dis-del-phy-power-chg-quirk;
|
|
+ snps,dis-tx-ipgap-linecheck-quirk;
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
gic: interrupt-controller@fd400000 {
|
|
compatible = "arm,gic-v3";
|
|
reg = <0x0 0xfd400000 0 0x10000>, /* GICD */
|
|
--
|
|
2.35.3
|
|
|