61 lines
1.8 KiB
Diff
61 lines
1.8 KiB
Diff
From 8bff05e18fd7f90673e2d29ece25c10ae9745409 Mon Sep 17 00:00:00 2001
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From: The-going <48602507+The-going@users.noreply.github.com>
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Date: Wed, 14 Dec 2022 20:15:41 +0300
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Subject: [PATCH 1/2] arm64: dts: sun50i-h616-orangepi-zero2: Add
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reg_usb1_vbus, usbotg, usbphy
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---
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.../allwinner/sun50i-h616-orangepi-zero2.dts | 32 +++++++++++++++++++
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1 file changed, 32 insertions(+)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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index 02893f3ac..48c8bf567 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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@@ -49,6 +49,17 @@ reg_vcc5v: vcc5v {
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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+
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+ reg_usb1_vbus: usb1-vbus {
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+ compatible = "regulator-fixed";
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+ regulator-name = "usb1-vbus";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <®_vcc5v>;
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+ enable-active-high;
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+ gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
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+ status = "okay";
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+ };
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};
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&emac0 {
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@@ -211,3 +222,24 @@ &uart0 {
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pinctrl-0 = <&uart0_ph_pins>;
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status = "okay";
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};
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+
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+&usbotg {
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+ /*
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+ * PHY0 pins are connected to a USB-C socket, but a role switch
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+ * is not implemented: both CC pins are pulled to GND.
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+ * The VBUS pins power the device, so a fixed peripheral mode
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+ * is the best choice.
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+ * The board can be powered via GPIOs, in this case port0 *can*
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+ * act as a host (with a cable/adapter ignoring CC), as VBUS is
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+ * then provided by the GPIOs. Any user of this setup would
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+ * need to adjust the DT accordingly: dr_mode set to "host",
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+ * enabling OHCI0 and EHCI0.
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+ */
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+ dr_mode = "peripheral";
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+ status = "okay";
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+};
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+
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+&usbphy {
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+ usb1_vbus-supply = <®_usb1_vbus>;
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+ status = "okay";
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+};
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--
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2.35.3
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