build/patch/kernel/archive/sunxi-6.4/patches.armbian/drv-clocksource-arm_arch_timer-fix-a64-timejump.patch

49 lines
2.4 KiB
Diff

From 10428d15972d1940646470645cd278ab8d157fb9 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 14:18:17 +0300
Subject: [PATCH 031/153] drv:clocksource:arm_arch_timer fix a64 timejump
---
drivers/clocksource/arm_arch_timer.c | 25 ++++++++++++++-----------
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index e09d4427f..44ea9e2ad 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -365,17 +365,20 @@ static u64 notrace arm64_858921_read_cntvct_el0(void)
* with all ones or all zeros in the low bits. Bound the loop by the maximum
* number of CPU cycles in 3 consecutive 24 MHz counter periods.
*/
-#define __sun50i_a64_read_reg(reg) ({ \
- u64 _val; \
- int _retries = 150; \
- \
- do { \
- _val = read_sysreg(reg); \
- _retries--; \
- } while (((_val + 1) & GENMASK(8, 0)) <= 1 && _retries); \
- \
- WARN_ON_ONCE(!_retries); \
- _val; \
+#define __sun50i_a64_read_reg(reg) ({ \
+ register u64 _tries = 5, _old, _new; \
+ \
+ do { \
+ if (unlikely(_tries < 3)) \
+ isb(); \
+ _old = read_sysreg(reg); \
+ _new = read_sysreg(reg); \
+ } while (unlikely((_new - _old) >> 4) && --_tries); \
+ \
+ if (unlikely(!_tries)) \
+ pr_err("(cpu %d) returning possibly incorrect counter value %llx (%llx)\n", \
+ smp_processor_id() + 1, _new, _old); \
+ _new; \
})
static u64 notrace sun50i_a64_read_cntpct_el0(void)
--
2.35.3