43 lines
1.3 KiB
Diff
43 lines
1.3 KiB
Diff
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From e2425dcc70115afc1eeb09d78f56239872824022 Mon Sep 17 00:00:00 2001
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From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
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Date: Thu, 22 Jul 2021 09:39:55 +0200
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Subject: [PATCH 021/478] arm64: dts: rockchip: add csi-dphy to px30
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Add the CSI dphy node to the core px30 devicetree for later use
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with the rkisp.
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Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
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Link: https://lore.kernel.org/r/20210722073955.1192168-1-heiko@sntech.de
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/px30.dtsi | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
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index 248ebb61aa79..6e53a4cc75e6 100644
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--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
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@@ -864,6 +864,19 @@ dsi_dphy: phy@ff2e0000 {
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status = "disabled";
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};
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+ csi_dphy: phy@ff2f0000 {
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+ compatible = "rockchip,px30-csi-dphy";
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+ reg = <0x0 0xff2f0000 0x0 0x4000>;
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+ clocks = <&cru PCLK_MIPICSIPHY>;
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+ clock-names = "pclk";
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+ #phy-cells = <0>;
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+ power-domains = <&power PX30_PD_VI>;
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+ resets = <&cru SRST_MIPICSIPHY_P>;
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+ reset-names = "apb";
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+ rockchip,grf = <&grf>;
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+ status = "disabled";
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+ };
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+
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usb20_otg: usb@ff300000 {
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compatible = "rockchip,px30-usb", "rockchip,rk3066-usb",
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"snps,dwc2";
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--
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2.35.3
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