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build/patch/kernel/archive/rockchip-4.4/01-linux-0005-dts.patch

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添加构建Allwinner H616四核2GB RAM SoC WiFi（蓝莓）
2023-09-19 11:24:52 +08:00
From cf1a1299ed4c29012b0cf0476d93f45d49629b18 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 1 Jul 2018 23:22:32 +0200
Subject: [PATCH] arm: dts: rockchip: rk3288: update dtsi
---
arch/arm/boot/dts/rk3288.dtsi | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 8e51132ef7e4..54b785278956 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -352,49 +352,57 @@
sdmmc: dwmmc@ff0c0000 {
compatible = "rockchip,rk3288-dw-mshc";
- clock-freq-min-max = <400000 150000000>;
+ max-frequency = <150000000>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff0c0000 0x0 0x4000>;
+ resets = <&cru SRST_MMC0>;
+ reset-names = "reset";
status = "disabled";
};
sdio0: dwmmc@ff0d0000 {
compatible = "rockchip,rk3288-dw-mshc";
- clock-freq-min-max = <400000 150000000>;
+ max-frequency = <150000000>;
clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
<&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff0d0000 0x0 0x4000>;
+ resets = <&cru SRST_SDIO0>;
+ reset-names = "reset";
status = "disabled";
};
sdio1: dwmmc@ff0e0000 {
compatible = "rockchip,rk3288-dw-mshc";
- clock-freq-min-max = <400000 150000000>;
+ max-frequency = <150000000>;
clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>,
<&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff0e0000 0x0 0x4000>;
+ resets = <&cru SRST_SDIO1>;
+ reset-names = "reset";
status = "disabled";
};
emmc: dwmmc@ff0f0000 {
compatible = "rockchip,rk3288-dw-mshc";
- clock-freq-min-max = <400000 150000000>;
+ max-frequency = <150000000>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff0f0000 0x0 0x4000>;
+ resets = <&cru SRST_EMMC>;
+ reset-names = "reset";
status = "disabled";
supports-emmc;
};
@@ -638,6 +646,7 @@
compatible = "rockchip,rk3288-tsadc";
reg = <0x0 0xff280000 0x0 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ rockchip,grf = <&grf>;
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "tsadc", "apb_pclk";
assigned-clocks = <&cru SCLK_TSADC>;
@@ -646,7 +655,7 @@
reset-names = "tsadc-apb";
pinctrl-names = "init", "default", "sleep";
pinctrl-0 = <&otp_gpio>;
- pinctrl-1 = <&otp_gpio>;
+ pinctrl-1 = <&otp_out>;
pinctrl-2 = <&otp_gpio>;
#thermal-sensor-cells = <1>;
rockchip,hw-tshut-temp = <120000>;
@@ -1699,6 +1708,7 @@
operating-points-v2 = <&gpu_opp_table>;
#cooling-cells = <2>; /* min followed by max */
power-domains = <&power RK3288_PD_GPU>;
+ power-off-delay-ms = <200>;
status = "disabled";
upthreshold = <75>;
From 25d521533a524ec201dd8b0e38a32989f8c00bfc Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 13 Aug 2017 10:24:19 +0200
Subject: [PATCH] arm: dts: rk3288-miniarm: update dts
---
arch/arm/boot/dts/rk3288-miniarm.dts | 55 ++++++++++++++++++++++++++++--------
1 file changed, 44 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts
index a5c5300797ab..7fc92c037dfd 100644
--- a/arch/arm/boot/dts/rk3288-miniarm.dts
+++ b/arch/arm/boot/dts/rk3288-miniarm.dts
@@ -42,11 +42,22 @@
#include <dt-bindings/clock/rockchip,rk808.h>
#include "rk3288.dtsi"
#include "rk3288-rkisp1.dtsi"
-#include "rk3288-linux.dtsi"
+#include "rk3288cg-opp.dtsi"
/ {
+ model = "ASUS Tinker Board";
compatible = "rockchip,rk3288-miniarm", "rockchip,rk3288";
+ chosen {
+ // bootargs = "earlyprintk=uart8250-32bit,0xff690000";
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <&efuse_id>;
+ nvmem-cell-names = "id";
+ };
+
memory {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
@@ -67,7 +78,7 @@
wireless-wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
- wifi_chip_type = "ap6212";
+ wifi_chip_type = "rtl8723bs";
sdio_vref = <1800>;
WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
status = "okay";
@@ -129,16 +140,16 @@
linux,default-trigger="mmc0";
};
- led1-led {
+ heartbeat-led {
gpios=<&gpio1 25 GPIO_ACTIVE_HIGH>;
- linux,default-trigger="default-off";
+ linux,default-trigger="heartbeat";
};
};
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
- simple-audio-card,name = "rockchip,miniarm-codec";
+ simple-audio-card,name = "HDMI";
simple-audio-card,mclk-fs = <512>;
simple-audio-card,cpu {
sound-dai = <&i2s>;
@@ -204,20 +215,33 @@
cpu0-supply = <&vdd_cpu>;
};
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+ status = "okay";
+};
+
&gmac {
phy-supply = <&vcc33_lan>;
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio4 7 0>;
snps,reset-active-low;
- snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-delays-us = <0 10000 50000>;
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&ext_gmac>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
tx_delay = <0x30>;
rx_delay = <0x10>;
- status = "ok";
+ status = "okay";
};
&dsi0 {
@@ -238,6 +262,11 @@
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <0>;
+ rockchip,phy-table =
+ <74250000 0x8009 0x0004 0x0272>,
+ <165000000 0x802b 0x0004 0x0209>,
+ <371250000 0x802d 0x0001 0x0149>,
+ <0 0x0000 0x0000 0x0000>;
status = "okay";
/* Don't use vopl for HDMI */
ports {
@@ -545,6 +574,7 @@
&i2s {
#sound-dai-cells = <0>;
+ rockchip,bclk-fs = <128>;
status = "okay";
};
@@ -558,7 +588,7 @@
&sdio0 {
status = "okay";
clock-frequency = <50000000>;
- clock-freq-min-max = <200000 50000000>;
+ max-frequency = <50000000>;
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
@@ -579,7 +609,7 @@
&saradc {
vref-supply = <&vcc18_ldo1>;
- status ="okay";
+ status = "okay";
};
&sdmmc {
@@ -604,7 +634,6 @@
&tsadc {
rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
- pinctrl-1 = <&otp_out>;
status = "okay";
};
@@ -615,6 +644,8 @@
};
&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_xfer>, <&uart1_cts>, <&uart1_rts>;
status = "okay";
};
@@ -627,6 +658,8 @@
};
&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_xfer>, <&uart4_cts>, <&uart4_rts>;
status = "okay";
};
@@ -644,7 +677,7 @@
};
&usb_otg {
- status= "okay";
+ status = "okay";
};
&vopb {
From 6cf3332dd491b1898930ff53e3cdd3b9f2a4a190 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Thu, 2 Nov 2017 23:17:46 +0100
Subject: [PATCH] arm: dts: rk3288-miqi: update dts
---
arch/arm/boot/dts/rk3288-miqi.dts | 69 ++++++++++++++++++++++++---------------
1 file changed, 43 insertions(+), 26 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index a2862c6a17f1..18f2a9f96d71 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -43,10 +43,21 @@
/dts-v1/;
#include <dt-bindings/pwm/pwm.h>
#include "rk3288.dtsi"
-#include "rk3288-linux.dtsi"
+#include "rk3288cg-opp.dtsi"
/ {
- compatible = "rockchip,rk3288-miqi", "rockchip,rk3288";
+ model = "mqmaker MiQi";
+ compatible = "rockchip,rk3288-miqi", "rockchip,rk3288w", "rockchip,rk3288";
+
+ chosen {
+ bootargs = "earlyprintk=uart8250-32bit,0xff690000";
+ };
+
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <&efuse_id>;
+ nvmem-cell-names = "id";
+ };
memory {
device_type = "memory";
@@ -56,29 +67,14 @@
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
- simple-audio-card,name = "DW-HDMI";
+ simple-audio-card,name = "HDMI";
simple-audio-card,mclk-fs = <512>;
-
- simple-audio-card,dai-link@0 { /* I2S - S/PDIF */
- format = "i2s";
- cpu {
- sound-dai = <&i2s>;
- };
- codec {
- sound-dai = <&hdmi>;
- };
+ simple-audio-card,cpu {
+ sound-dai = <&i2s>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
};
-
- /*
- * If you want to support more cards,
- * you can add more dai-link node,
- * such as
- *
- * simple-audio-card,dai-link@1 {
- * ......
- * }
- */
-
};
ext_gmac: external-gmac-clock {
@@ -204,6 +200,12 @@
#size-cells = <0>;
#sound-dai-cells = <0>;
status = "okay";
+ /* Don't use vopl for HDMI */
+ ports {
+ hdmi_in: port {
+ /delete-node/ endpoint@1;
+ };
+ };
};
&hevc_service {
@@ -235,14 +237,14 @@
clock_in_out = "input";
snps,reset-gpio = <&gpio4 7 0>;
snps,reset-active-low;
- snps,reset-delays-us = <0 10000 1000000>;
+ snps,reset-delays-us = <0 10000 50000>;
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&ext_gmac>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
tx_delay = <0x30>;
rx_delay = <0x10>;
- status = "ok";
+ status = "okay";
};
/* ----------------------------------------------------------------------------------
@@ -414,6 +416,7 @@ I2C
&i2s {
#sound-dai-cells = <0>;
+ rockchip,bclk-fs = <128>;
status = "okay";
};
@@ -439,6 +442,17 @@ I2C
status = "okay";
};
+&saradc {
+ vref-supply = <&vcc_18>;
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
/*
* Debug Serial Port
*/
@@ -472,6 +486,10 @@ I2C
&vopl {
status = "okay";
+ /* Don't use vopl for HDMI */
+ vopl_out: port {
+ /delete-node/ endpoint@0;
+ };
};
&vopl_mmu {
@@ -546,4 +564,3 @@ I2C
};
};
-
From 7134a982d5f5f6995cc06e5ea4c0ee452111bb91 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sun, 28 Jan 2018 15:38:32 +0100
Subject: [PATCH] arm: dts: rk3288: add cec clock and pinctrl
---
arch/arm/boot/dts/rk3288.dtsi | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 54b785278956..e3e3a58bb91e 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -981,7 +981,8 @@
<&cru PCLK_MIPI_DSI1>,
<&cru SCLK_EDP_24M>,
<&cru SCLK_EDP>,
<&cru SCLK_HDMI_CEC>,
+ <&cru SCLK_HDMI_HDCP>,
<&cru SCLK_ISP_JPE>,
<&cru SCLK_ISP>,
<&cru SCLK_RGA>;
@@ -1587,7 +1587,7 @@
clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>;
clock-names = "iahb", "isfr", "cec";
pinctrl-names = "default", "sleep";
- pinctrl-0 = <&hdmi_ddc>;
+ pinctrl-0 = <&hdmi_ddc>, <&hdmi_cec_c0>;
pinctrl-1 = <&hdmi_gpio>;
power-domains = <&power RK3288_PD_VIO>;
status = "disabled";
@@ -1966,6 +1968,14 @@
&pcfg_pull_none>;
};
+ hdmi_cec_c0: hdmi-cec-c0 {
+ rockchip,pins = <7 16 RK_FUNC_2 &pcfg_pull_none>;
+ };
+
+ hdmi_cec_c7: hdmi-cec-c7 {
+ rockchip,pins = <7 23 RK_FUNC_4 &pcfg_pull_none>;
+ };
+
hdmi_ddc: hdmi-ddc {
rockchip,pins = <7 19 RK_FUNC_2 &pcfg_pull_none>,
<7 20 RK_FUNC_2 &pcfg_pull_none>;
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