471 lines
12 KiB
Diff
471 lines
12 KiB
Diff
From cf1a1299ed4c29012b0cf0476d93f45d49629b18 Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Sun, 1 Jul 2018 23:22:32 +0200
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Subject: [PATCH] arm: dts: rockchip: rk3288: update dtsi
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---
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arch/arm/boot/dts/rk3288.dtsi | 20 +++++++++++++++-----
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1 file changed, 15 insertions(+), 5 deletions(-)
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diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
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index 8e51132ef7e4..54b785278956 100644
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--- a/arch/arm/boot/dts/rk3288.dtsi
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+++ b/arch/arm/boot/dts/rk3288.dtsi
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@@ -352,49 +352,57 @@
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sdmmc: dwmmc@ff0c0000 {
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compatible = "rockchip,rk3288-dw-mshc";
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- clock-freq-min-max = <400000 150000000>;
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+ max-frequency = <150000000>;
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clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
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<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x0 0xff0c0000 0x0 0x4000>;
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+ resets = <&cru SRST_MMC0>;
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+ reset-names = "reset";
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status = "disabled";
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};
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sdio0: dwmmc@ff0d0000 {
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compatible = "rockchip,rk3288-dw-mshc";
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- clock-freq-min-max = <400000 150000000>;
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+ max-frequency = <150000000>;
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clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
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<&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x0 0xff0d0000 0x0 0x4000>;
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+ resets = <&cru SRST_SDIO0>;
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+ reset-names = "reset";
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status = "disabled";
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};
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sdio1: dwmmc@ff0e0000 {
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compatible = "rockchip,rk3288-dw-mshc";
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- clock-freq-min-max = <400000 150000000>;
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+ max-frequency = <150000000>;
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clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>,
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<&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>;
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x0 0xff0e0000 0x0 0x4000>;
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+ resets = <&cru SRST_SDIO1>;
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+ reset-names = "reset";
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status = "disabled";
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};
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emmc: dwmmc@ff0f0000 {
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compatible = "rockchip,rk3288-dw-mshc";
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- clock-freq-min-max = <400000 150000000>;
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+ max-frequency = <150000000>;
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clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
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<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x0 0xff0f0000 0x0 0x4000>;
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+ resets = <&cru SRST_EMMC>;
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+ reset-names = "reset";
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status = "disabled";
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supports-emmc;
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};
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@@ -638,6 +646,7 @@
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compatible = "rockchip,rk3288-tsadc";
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reg = <0x0 0xff280000 0x0 0x100>;
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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+ rockchip,grf = <&grf>;
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clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
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clock-names = "tsadc", "apb_pclk";
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assigned-clocks = <&cru SCLK_TSADC>;
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@@ -646,7 +655,7 @@
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reset-names = "tsadc-apb";
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pinctrl-names = "init", "default", "sleep";
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pinctrl-0 = <&otp_gpio>;
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- pinctrl-1 = <&otp_gpio>;
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+ pinctrl-1 = <&otp_out>;
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pinctrl-2 = <&otp_gpio>;
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#thermal-sensor-cells = <1>;
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rockchip,hw-tshut-temp = <120000>;
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@@ -1699,6 +1708,7 @@
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operating-points-v2 = <&gpu_opp_table>;
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#cooling-cells = <2>; /* min followed by max */
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power-domains = <&power RK3288_PD_GPU>;
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+ power-off-delay-ms = <200>;
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status = "disabled";
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upthreshold = <75>;
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From 25d521533a524ec201dd8b0e38a32989f8c00bfc Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Sun, 13 Aug 2017 10:24:19 +0200
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Subject: [PATCH] arm: dts: rk3288-miniarm: update dts
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---
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arch/arm/boot/dts/rk3288-miniarm.dts | 55 ++++++++++++++++++++++++++++--------
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1 file changed, 44 insertions(+), 11 deletions(-)
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diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts
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index a5c5300797ab..7fc92c037dfd 100644
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--- a/arch/arm/boot/dts/rk3288-miniarm.dts
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+++ b/arch/arm/boot/dts/rk3288-miniarm.dts
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@@ -42,11 +42,22 @@
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#include <dt-bindings/clock/rockchip,rk808.h>
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#include "rk3288.dtsi"
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#include "rk3288-rkisp1.dtsi"
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-#include "rk3288-linux.dtsi"
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+#include "rk3288cg-opp.dtsi"
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/ {
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+ model = "ASUS Tinker Board";
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compatible = "rockchip,rk3288-miniarm", "rockchip,rk3288";
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+ chosen {
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+ // bootargs = "earlyprintk=uart8250-32bit,0xff690000";
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+ };
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+
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+ cpuinfo {
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+ compatible = "rockchip,cpuinfo";
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+ nvmem-cells = <&efuse_id>;
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+ nvmem-cell-names = "id";
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+ };
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+
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memory {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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@@ -67,7 +78,7 @@
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wireless-wlan {
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compatible = "wlan-platdata";
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rockchip,grf = <&grf>;
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- wifi_chip_type = "ap6212";
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+ wifi_chip_type = "rtl8723bs";
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sdio_vref = <1800>;
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WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
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status = "okay";
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@@ -129,16 +140,16 @@
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linux,default-trigger="mmc0";
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};
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- led1-led {
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+ heartbeat-led {
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gpios=<&gpio1 25 GPIO_ACTIVE_HIGH>;
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- linux,default-trigger="default-off";
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+ linux,default-trigger="heartbeat";
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};
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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- simple-audio-card,name = "rockchip,miniarm-codec";
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+ simple-audio-card,name = "HDMI";
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simple-audio-card,mclk-fs = <512>;
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simple-audio-card,cpu {
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sound-dai = <&i2s>;
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@@ -204,20 +215,33 @@
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cpu0-supply = <&vdd_cpu>;
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};
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+&emmc {
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+ bus-width = <8>;
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+ cap-mmc-highspeed;
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+ disable-wp;
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+ mmc-ddr-1_8v;
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+ mmc-hs200-1_8v;
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+ non-removable;
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+ num-slots = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
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+ status = "okay";
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+};
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+
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&gmac {
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phy-supply = <&vcc33_lan>;
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phy-mode = "rgmii";
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clock_in_out = "input";
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snps,reset-gpio = <&gpio4 7 0>;
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snps,reset-active-low;
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- snps,reset-delays-us = <0 10000 1000000>;
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+ snps,reset-delays-us = <0 10000 50000>;
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assigned-clocks = <&cru SCLK_MAC>;
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assigned-clock-parents = <&ext_gmac>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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tx_delay = <0x30>;
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rx_delay = <0x10>;
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- status = "ok";
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+ status = "okay";
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};
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&dsi0 {
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@@ -238,6 +262,11 @@
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#address-cells = <1>;
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#size-cells = <0>;
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#sound-dai-cells = <0>;
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+ rockchip,phy-table =
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+ <74250000 0x8009 0x0004 0x0272>,
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+ <165000000 0x802b 0x0004 0x0209>,
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+ <371250000 0x802d 0x0001 0x0149>,
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+ <0 0x0000 0x0000 0x0000>;
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status = "okay";
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/* Don't use vopl for HDMI */
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ports {
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@@ -545,6 +574,7 @@
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&i2s {
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#sound-dai-cells = <0>;
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+ rockchip,bclk-fs = <128>;
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status = "okay";
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};
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@@ -558,7 +588,7 @@
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&sdio0 {
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status = "okay";
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clock-frequency = <50000000>;
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- clock-freq-min-max = <200000 50000000>;
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+ max-frequency = <50000000>;
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bus-width = <4>;
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cap-sd-highspeed;
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cap-sdio-irq;
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@@ -579,7 +609,7 @@
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&saradc {
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vref-supply = <&vcc18_ldo1>;
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- status ="okay";
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+ status = "okay";
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};
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&sdmmc {
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@@ -604,7 +634,6 @@
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&tsadc {
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rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
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rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
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- pinctrl-1 = <&otp_out>;
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status = "okay";
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};
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@@ -615,6 +644,8 @@
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};
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&uart1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart1_xfer>, <&uart1_cts>, <&uart1_rts>;
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status = "okay";
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};
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@@ -627,6 +658,8 @@
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};
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&uart4 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart4_xfer>, <&uart4_cts>, <&uart4_rts>;
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status = "okay";
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};
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@@ -644,7 +677,7 @@
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};
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&usb_otg {
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- status= "okay";
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+ status = "okay";
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};
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&vopb {
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From 6cf3332dd491b1898930ff53e3cdd3b9f2a4a190 Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Thu, 2 Nov 2017 23:17:46 +0100
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Subject: [PATCH] arm: dts: rk3288-miqi: update dts
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---
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arch/arm/boot/dts/rk3288-miqi.dts | 69 ++++++++++++++++++++++++---------------
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1 file changed, 43 insertions(+), 26 deletions(-)
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diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
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index a2862c6a17f1..18f2a9f96d71 100644
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--- a/arch/arm/boot/dts/rk3288-miqi.dts
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+++ b/arch/arm/boot/dts/rk3288-miqi.dts
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@@ -43,10 +43,21 @@
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/dts-v1/;
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#include <dt-bindings/pwm/pwm.h>
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#include "rk3288.dtsi"
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-#include "rk3288-linux.dtsi"
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+#include "rk3288cg-opp.dtsi"
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/ {
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- compatible = "rockchip,rk3288-miqi", "rockchip,rk3288";
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+ model = "mqmaker MiQi";
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+ compatible = "rockchip,rk3288-miqi", "rockchip,rk3288w", "rockchip,rk3288";
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+
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+ chosen {
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+ bootargs = "earlyprintk=uart8250-32bit,0xff690000";
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+ };
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+
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+ cpuinfo {
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+ compatible = "rockchip,cpuinfo";
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+ nvmem-cells = <&efuse_id>;
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+ nvmem-cell-names = "id";
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+ };
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memory {
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device_type = "memory";
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@@ -56,29 +67,14 @@
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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- simple-audio-card,name = "DW-HDMI";
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+ simple-audio-card,name = "HDMI";
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simple-audio-card,mclk-fs = <512>;
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-
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- simple-audio-card,dai-link@0 { /* I2S - S/PDIF */
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- format = "i2s";
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- cpu {
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- sound-dai = <&i2s>;
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- };
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- codec {
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- sound-dai = <&hdmi>;
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- };
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s>;
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+ };
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+ simple-audio-card,codec {
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+ sound-dai = <&hdmi>;
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};
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-
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- /*
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- * If you want to support more cards,
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- * you can add more dai-link node,
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- * such as
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- *
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- * simple-audio-card,dai-link@1 {
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- * ......
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- * }
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- */
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-
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};
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ext_gmac: external-gmac-clock {
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@@ -204,6 +200,12 @@
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#size-cells = <0>;
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#sound-dai-cells = <0>;
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status = "okay";
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+ /* Don't use vopl for HDMI */
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+ ports {
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+ hdmi_in: port {
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+ /delete-node/ endpoint@1;
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+ };
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+ };
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};
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&hevc_service {
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@@ -235,14 +237,14 @@
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clock_in_out = "input";
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snps,reset-gpio = <&gpio4 7 0>;
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snps,reset-active-low;
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- snps,reset-delays-us = <0 10000 1000000>;
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+ snps,reset-delays-us = <0 10000 50000>;
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assigned-clocks = <&cru SCLK_MAC>;
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assigned-clock-parents = <&ext_gmac>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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tx_delay = <0x30>;
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rx_delay = <0x10>;
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- status = "ok";
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+ status = "okay";
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};
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/* ----------------------------------------------------------------------------------
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@@ -414,6 +416,7 @@ I2C
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&i2s {
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#sound-dai-cells = <0>;
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+ rockchip,bclk-fs = <128>;
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status = "okay";
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};
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@@ -439,6 +442,17 @@ I2C
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status = "okay";
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};
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+&saradc {
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+ vref-supply = <&vcc_18>;
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+ status = "okay";
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+};
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+
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+&tsadc {
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+ rockchip,hw-tshut-mode = <0>;
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+ rockchip,hw-tshut-polarity = <0>;
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+ status = "okay";
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+};
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+
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/*
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* Debug Serial Port
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*/
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@@ -472,6 +486,10 @@ I2C
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&vopl {
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status = "okay";
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+ /* Don't use vopl for HDMI */
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+ vopl_out: port {
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+ /delete-node/ endpoint@0;
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+ };
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};
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&vopl_mmu {
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@@ -546,4 +564,3 @@ I2C
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};
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};
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-
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From 7134a982d5f5f6995cc06e5ea4c0ee452111bb91 Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Sun, 28 Jan 2018 15:38:32 +0100
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Subject: [PATCH] arm: dts: rk3288: add cec clock and pinctrl
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---
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arch/arm/boot/dts/rk3288.dtsi | 16 +++++++++++++---
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1 file changed, 13 insertions(+), 3 deletions(-)
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diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
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index 54b785278956..e3e3a58bb91e 100644
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--- a/arch/arm/boot/dts/rk3288.dtsi
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+++ b/arch/arm/boot/dts/rk3288.dtsi
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@@ -981,7 +981,8 @@
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<&cru PCLK_MIPI_DSI1>,
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<&cru SCLK_EDP_24M>,
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<&cru SCLK_EDP>,
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<&cru SCLK_HDMI_CEC>,
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+ <&cru SCLK_HDMI_HDCP>,
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<&cru SCLK_ISP_JPE>,
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<&cru SCLK_ISP>,
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<&cru SCLK_RGA>;
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@@ -1587,7 +1587,7 @@
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clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>;
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clock-names = "iahb", "isfr", "cec";
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pinctrl-names = "default", "sleep";
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- pinctrl-0 = <&hdmi_ddc>;
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+ pinctrl-0 = <&hdmi_ddc>, <&hdmi_cec_c0>;
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pinctrl-1 = <&hdmi_gpio>;
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power-domains = <&power RK3288_PD_VIO>;
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status = "disabled";
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@@ -1966,6 +1968,14 @@
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&pcfg_pull_none>;
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};
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+ hdmi_cec_c0: hdmi-cec-c0 {
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+ rockchip,pins = <7 16 RK_FUNC_2 &pcfg_pull_none>;
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+ };
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+
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+ hdmi_cec_c7: hdmi-cec-c7 {
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+ rockchip,pins = <7 23 RK_FUNC_4 &pcfg_pull_none>;
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+ };
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+
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hdmi_ddc: hdmi-ddc {
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rockchip,pins = <7 19 RK_FUNC_2 &pcfg_pull_none>,
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<7 20 RK_FUNC_2 &pcfg_pull_none>;
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|
|