40 lines
1.5 KiB
Diff
40 lines
1.5 KiB
Diff
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From f9b39cf4e873807063127892be4c1436c81dd44d Mon Sep 17 00:00:00 2001
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From: Ondrej Jirman <megi@xff.cz>
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Date: Mon, 24 Oct 2022 03:20:27 +0200
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Subject: [PATCH 290/391] arm64: dts: rk3399-pinephone-pro: Use unused GPLL for
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VOPs DCLK
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GPLL allows us to get 74.25MHz just by dividing 594 by 8. Use GPLL by default
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for VOPs.
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Signed-off-by: Ondrej Jirman <megi@xff.cz>
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---
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arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
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index 221082568..26c98a89a 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
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@@ -1555,7 +1555,7 @@ &vopb {
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status = "okay";
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assigned-clocks = <&cru DCLK_VOP0_DIV>, <&cru DCLK_VOP0>, <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
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assigned-clock-rates = <0>, <0>, <400000000>, <100000000>;
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- assigned-clock-parents = <&cru PLL_CPLL>, <&cru DCLK_VOP0_FRAC>;
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+ assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP0_DIV>;
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};
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&vopb_mmu {
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@@ -1566,7 +1566,7 @@ &vopl {
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status = "okay";
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assigned-clocks = <&cru DCLK_VOP1_DIV>, <&cru DCLK_VOP1>, <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
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assigned-clock-rates = <0>, <0>, <400000000>, <100000000>;
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- assigned-clock-parents = <&cru PLL_CPLL>, <&cru DCLK_VOP1_FRAC>;
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+ assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP1_DIV>;
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};
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&vopl_mmu {
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--
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2.35.3
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