51 lines
1.5 KiB
Diff
51 lines
1.5 KiB
Diff
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From e31083f9185928ea093c61152c139bb4c96c7ad2 Mon Sep 17 00:00:00 2001
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From: Chris Morgan <macromorgan@hotmail.com>
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Date: Thu, 12 Aug 2021 21:46:39 +0800
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Subject: [PATCH 051/478] arm64: dts: rockchip: Enable SFC for Odroid Go
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Advance
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This enables the Rockchip Serial Flash Controller for the Odroid Go
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Advance. Note that while the attached SPI NOR flash and the controller
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both support quad read mode, only 2 of the required 4 pins are present.
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The rx bus width is set to 2 for this reason, and tx bus width is set
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to 1 for compatibility reasons.
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Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
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Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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Link: https://lore.kernel.org/r/20210812134639.31586-2-jon.lin@rock-chips.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../boot/dts/rockchip/rk3326-odroid-go2.dts | 16 ++++++++++++++++
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1 file changed, 16 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
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index 7fc674a99a6c..35218c2771a2 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
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@@ -517,6 +517,22 @@ &sdmmc {
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status = "okay";
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};
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+&sfc {
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+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>;
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+ pinctrl-names = "default";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "okay";
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+
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+ flash@0 {
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+ compatible = "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <108000000>;
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+ spi-rx-bus-width = <2>;
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+ spi-tx-bus-width = <1>;
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+ };
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+};
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+
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&tsadc {
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status = "okay";
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};
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--
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2.35.3
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