84 lines
2.0 KiB
Diff
84 lines
2.0 KiB
Diff
From 4f91deda915a27c3fc7542533bbe65591b3b83b6 Mon Sep 17 00:00:00 2001
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From: schwar3kat <61094841+schwar3kat@users.noreply.github.com>
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Date: Mon, 21 Feb 2022 22:29:47 +1300
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Subject: [PATCH] rk3328-orangepi-r1-plus-lts.dts
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Signed-off-by: schwar3kat <61094841+schwar3kat@users.noreply.github.com>
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---
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.../rockchip/rk3328-orangepi-r1-plus-lts.dts | 66 +++++
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1 files changed, 66 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
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diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
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new file mode 100644
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index 000000000..10d50ebd4
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
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@@ -0,0 +1,66 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2016 Xunlong Software. Co., Ltd.
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+ * (http://www.orangepi.org)
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+ *
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+ * Copyright (c) 2021 Tianling Shen <cnsztl@immortalwrt.org>
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+ */
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+
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+#include "rk3328-orangepi-r1-plus.dts"
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+
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+/ {
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+ model = "Xunlong Orange Pi R1 Plus LTS";
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+ compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328";
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+};
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+
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+&dmc_opp_table {
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+ opp-798000000 {
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+ status = "disabled";
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+ };
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+ opp-840000000 {
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+ status = "disabled";
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+ };
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+ opp-924000000 {
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+ status = "disabled";
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+ };
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+ opp-1056000000 {
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+ status = "disabled";
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+ };
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+};
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+
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+&gmac2io {
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+ phy-handle = <&yt8531c>;
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+ tx_delay = <0x19>;
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+ rx_delay = <0x05>;
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+
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+ mdio {
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+ /delete-node/ ethernet-phy@1;
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+
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+ yt8531c: ethernet-phy@0 {
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+ compatible = "ethernet-phy-id4f51.e91b",
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+ "ethernet-phy-ieee802.3-c22";
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+ reg = <0>;
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+ pinctrl-0 = <ð_phy_reset_pin>;
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+ pinctrl-names = "default";
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+ reset-assert-us = <15000>;
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+ reset-deassert-us = <50000>;
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+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+};
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+
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+&lan_led {
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+ label = "orangepi-r1-plus-lts:green:lan";
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+};
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+
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+&sys_led {
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+ label = "orangepi-r1-plus-lts:red:sys";
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+};
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+
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+&usb3phy_grf {
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+ realtek,led-data = <0x78>;
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+};
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+
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+&wan_led {
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+ label = "orangepi-r1-plus-lts:green:wan";
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+};
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