57 lines
2.0 KiB
Diff
57 lines
2.0 KiB
Diff
From 57ea3a4ac6f7400d1d4b00b38e4ad1b981741ffe Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sun, 25 Aug 2019 19:41:02 -0500
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Subject: [PATCH 168/351] ARM: dts: sunxi: h3/h5: Move wakeup-capable IRQs to
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r_intc
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All IRQs that can be used to wake up the system must be routed through
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r_intc, so they are visible to firmware while the system is suspended.
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For the H3/H5, r_intc IRQ numbers are offset by 32 from the GIC IRQ
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numbers.
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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arch/arm/boot/dts/sunxi-h3-h5.dtsi | 11 +++++++----
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1 file changed, 7 insertions(+), 4 deletions(-)
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diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
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index e4a9db619920..66c2f2013136 100644
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--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
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+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
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@@ -847,8 +847,9 @@ hdmi_phy: hdmi-phy@1ef0000 {
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rtc: rtc@1f00000 {
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/* compatible is in per SoC .dtsi file */
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reg = <0x01f00000 0x400>;
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- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
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- <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-parent = <&r_intc>;
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+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
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+ <9 IRQ_TYPE_LEVEL_HIGH>;
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clock-output-names = "osc32k", "osc32k-out", "iosc";
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clocks = <&osc32k>;
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#clock-cells = <1>;
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@@ -884,7 +885,8 @@ ir: ir@1f02000 {
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clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
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clock-names = "apb", "ir";
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resets = <&r_ccu RST_APB0_IR>;
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- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-parent = <&r_intc>;
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+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x01f02000 0x400>;
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status = "disabled";
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};
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@@ -905,7 +907,8 @@ r_i2c: i2c@1f02400 {
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r_pio: pinctrl@1f02c00 {
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compatible = "allwinner,sun8i-h3-r-pinctrl";
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reg = <0x01f02c00 0x400>;
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- interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-parent = <&r_intc>;
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+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>;
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clock-names = "apb", "hosc", "losc";
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gpio-controller;
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--
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2.34.0
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