39 lines
1.4 KiB
Diff
39 lines
1.4 KiB
Diff
From 9e105544fcb63f8f79b199d1b194a36a354519b3 Mon Sep 17 00:00:00 2001
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From: Paolo Sabatino <paolo.sabatino@gmail.com>
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Date: Sun, 2 Apr 2023 10:53:07 +0000
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Subject: [PATCH 2/2] rk322x: better handle mmc/sdio clocks
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---
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drivers/clk/rockchip/clk-rk3228.c | 10 ++++------
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1 file changed, 4 insertions(+), 6 deletions(-)
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diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
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index 996f8bfee..0f690dd84 100644
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--- a/drivers/clk/rockchip/clk-rk3228.c
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+++ b/drivers/clk/rockchip/clk-rk3228.c
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@@ -371,17 +371,15 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
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RK2928_CLKSEL_CON(11), 8, 2, MFLAGS, 0, 8, DFLAGS,
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RK2928_CLKGATE_CON(2), 11, GFLAGS),
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- COMPOSITE_NODIV(SCLK_SDIO_SRC, "sclk_sdio_src", mux_mmc_src_p, 0,
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+ COMPOSITE_DIV_OFFSET(SCLK_SDIO, "sclk_sdio", mux_mmc_src_p, 0,
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RK2928_CLKSEL_CON(11), 10, 2, MFLAGS,
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+ RK2928_CLKSEL_CON(12), 0, 8, DFLAGS,
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RK2928_CLKGATE_CON(2), 13, GFLAGS),
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- DIV(SCLK_SDIO, "sclk_sdio", "sclk_sdio_src", 0,
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- RK2928_CLKSEL_CON(12), 0, 8, DFLAGS),
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- COMPOSITE_NODIV(0, "sclk_emmc_src", mux_mmc_src_p, 0,
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+ COMPOSITE_DIV_OFFSET(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,
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RK2928_CLKSEL_CON(11), 12, 2, MFLAGS,
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+ RK2928_CLKSEL_CON(12), 8, 8, DFLAGS,
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RK2928_CLKGATE_CON(2), 14, GFLAGS),
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- DIV(SCLK_EMMC, "sclk_emmc", "sclk_emmc_src", 0,
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- RK2928_CLKSEL_CON(12), 8, 8, DFLAGS),
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/*
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* Clock-Architecture Diagram 2
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--
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2.34.1
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