55 lines
1.8 KiB
Diff
55 lines
1.8 KiB
Diff
From 8882842d89ba8fd22c961318b418ff3f14a59bc8 Mon Sep 17 00:00:00 2001
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From: Ondrej Jirman <megous@megous.com>
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Date: Thu, 16 Sep 2021 17:47:10 +0200
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Subject: [PATCH 425/478] soc: rockchip: fix usb3otg port on rk3566
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The usb3otg port defaults to using the usb3phy clock, which isn't
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available on the rk3566 (due to the usb3phy being physically missing).
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We need to switch to the usb2phy clock for the usb3otg controller to
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function.
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Signed-off-by: Peter Geis <pgwipeout@gmail.com>
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---
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drivers/soc/rockchip/grf.c | 17 +++++++++++++++++
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1 file changed, 17 insertions(+)
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diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c
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index 494cf2b5bf7b..3aebb258845a 100644
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--- a/drivers/soc/rockchip/grf.c
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+++ b/drivers/soc/rockchip/grf.c
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@@ -108,6 +108,20 @@ static const struct rockchip_grf_info rk3399_grf __initconst = {
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.num_values = ARRAY_SIZE(rk3399_defaults),
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};
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+#define RK3566_GRF_USB3OTG0_CON1 0x0104
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+
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+static const struct rockchip_grf_value rk3566_defaults[] __initconst = {
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+ { "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(0, 1, 12) },
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+ { "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 7) },
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+ { "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 0) },
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+};
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+
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+static const struct rockchip_grf_info rk3566_pipegrf __initconst = {
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+ .values = rk3566_defaults,
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+ .num_values = ARRAY_SIZE(rk3566_defaults),
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+};
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+
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+
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static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
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{
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.compatible = "rockchip,rk3036-grf",
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@@ -130,6 +144,9 @@ static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
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}, {
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.compatible = "rockchip,rk3399-grf",
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.data = (void *)&rk3399_grf,
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+ }, {
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+ .compatible = "rockchip,rk3566-pipegrf",
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+ .data = (void *)&rk3566_pipegrf,
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},
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{ /* sentinel */ },
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};
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--
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2.35.3
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